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[54.240.197.231]) by smtp.gmail.com with ESMTPSA id bt9-20020a056000080900b0031c5ce91ad6sm16328019wrb.97.2023.09.06.04.47.13 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Sep 2023 04:47:13 -0700 (PDT) From: Puranjay Mohan To: "Russell King (Oracle)" Cc: Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Shubham Bansal , Mykola Lysenko , Shuah Khan , bpf@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH bpf-next 2/8] arm32, bpf: add support for sign-extension load instruction References: <20230905210621.1711859-1-puranjay12@gmail.com> <20230905210621.1711859-3-puranjay12@gmail.com> Date: Wed, 06 Sep 2023 11:47:13 +0000 In-Reply-To: (Russell King's message of "Tue, 5 Sep 2023 22:24:09 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.2 (gnu/linux) Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On Tue, Sep 05 2023, Russell King (Oracle) wrote: [...] >> +/* dst = *(signed size*)(src + off) */ >> +static inline void emit_ldsx_r(const s8 dst[], const s8 src, >> + s16 off, struct jit_ctx *ctx, const u8 sz){ >> + const s8 *tmp = bpf2a32[TMP_REG_1]; >> + const s8 *rd = is_stacked(dst_lo) ? tmp : dst; >> + s8 rm = src; >> + >> + if (!is_ldst_imm8(off, sz)) { >> + emit_a32_mov_i(tmp[0], off, ctx); >> + emit(ARM_ADD_R(tmp[0], tmp[0], src), ctx); > > Hmm. This looks inefficient when "off" is able to fit in an immediate. > Please try: > > int add_off; > > if (!is_ldst_imm8(off, sz)) { > add_off = imm8m(off); > if (add_off > 0) { > emit(ARM_ADD_I(tmp[0], src, add_off), ctx); > rm = tmp[0]; > } else { > emit_a32_mov_i(tmp[0], off, ctx); > emit(ARM_ADD_R(tmp[0], tmp[0], src), ctx); > rm = tmp[0]; > } > off = 0; >> + } else if (rd[1] == rm) { >> + emit(ARM_MOV_R(tmp[0], rm), ctx); >> + rm = tmp[0]; > > Why do you need this? rd and rm can be the same for LDRS[BH]. I agree that this is not required, will remove in the next version. Will also use the suggested optimization for immediate. >> + } >> + switch (sz) { >> + case BPF_B: >> + /* Load a Byte with sign extension*/ >> + emit(ARM_LDRSB_I(rd[1], rm, off), ctx); >> + /* Carry the sign extension to upper 32 bits */ >> + emit(ARM_ASR_I(rd[0], rd[1], 31), ctx); >> + break; >> + case BPF_H: >> + /* Load a HalfWord with sign extension*/ >> + emit(ARM_LDRSH_I(rd[1], rm, off), ctx); >> + /* Carry the sign extension to upper 32 bits */ >> + emit(ARM_ASR_I(rd[0], rd[1], 31), ctx); >> + break; >> + case BPF_W: >> + /* Load a Word*/ >> + emit(ARM_LDR_I(rd[1], rm, off), ctx); >> + /* Carry the sign extension to upper 32 bits */ >> + emit(ARM_ASR_I(rd[0], rd[1], 31), ctx); > > The last instruction extending to the upper 32 bits is the same in each > of these cases, so is there any reason not to do it outside the switch > statement? Will move it outside in the next version. Thanks, Puranjay