From: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
To: buildroot@busybox.net
Subject: [Buildroot] [PATCH 2/2] MIPS: add support for MSA
Date: Tue, 18 Oct 2016 20:51:28 +0200 [thread overview]
Message-ID: <20161018185128.6404-2-arnout@mind.be> (raw)
In-Reply-To: <20161018185128.6404-1-arnout@mind.be>
From: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
[Arnout: use the TARGET_FLAGS variable]
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
---
v2: use the TARGET_FLAGS variable introduced by the previous patch
(Arnout)
---
arch/Config.in.mips | 17 +++++++++++++++++
toolchain/toolchain-wrapper.mk | 7 +++++++
2 files changed, 24 insertions(+)
diff --git a/arch/Config.in.mips b/arch/Config.in.mips
index f7bfa21..fb9053c 100644
--- a/arch/Config.in.mips
+++ b/arch/Config.in.mips
@@ -16,6 +16,14 @@ config BR2_MIPS_CPU_MIPS64R5
config BR2_MIPS_CPU_MIPS64R6
bool
+# mips cpu features
+config BR2_MIPS_CPU_HAS_MSA
+ bool
+
+# for some cores, MSA support is optional
+config BR2_MIPS_CPU_MAYBE_HAS_MSA
+ bool
+
choice
prompt "Target Architecture Variant"
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
@@ -113,6 +121,15 @@ config BR2_MIPS_SOFT_FLOAT
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
+config BR2_MIPS_ENABLE_MSA
+ bool "Enable MIPS SIMD Architecture (MSA) support"
+ depends on BR2_MIPS_CPU_MAYBE_HAS_MSA && !BR2_SOFT_FLOAT
+ select BR2_MIPS_CPU_HAS_MSA
+ help
+ For some CPU cores, the MSA extension is optional.
+ Select this option if you are certain your particular
+ implementation has MSA support and you want to use it.
+
config BR2_ARCH
default "mips" if BR2_mips
default "mipsel" if BR2_mipsel
diff --git a/toolchain/toolchain-wrapper.mk b/toolchain/toolchain-wrapper.mk
index 8939650..76fd557 100644
--- a/toolchain/toolchain-wrapper.mk
+++ b/toolchain/toolchain-wrapper.mk
@@ -9,6 +9,13 @@ else
TOOLCHAIN_WRAPPER_HASH_STYLE = both
endif
+# MIPS optimization flags
+ifeq ($(BR2_MIPS_CPU_HAS_MSA),y)
+TARGET_FLAGS += -mmsa
+endif
+
+# Keep BR2_TARGET_OPTIMIZATION as the last one since it may be used
+# to override the automatically added options above.
TARGET_FLAGS += $(call qstrip,$(BR2_TARGET_OPTIMIZATION))
TOOLCHAIN_WRAPPER_ARGS = $($(PKG)_TOOLCHAIN_WRAPPER_ARGS)
--
2.9.3
next prev parent reply other threads:[~2016-10-18 18:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-18 18:51 [Buildroot] [PATCH 1/2] toolchain-wrapper.mk: refactor additional flags into TARGET_FLAGS Arnout Vandecappelle
2016-10-18 18:51 ` Arnout Vandecappelle [this message]
2016-10-18 18:57 ` Arnout Vandecappelle
2016-10-25 21:41 ` Thomas Petazzoni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161018185128.6404-2-arnout@mind.be \
--to=arnout@mind.be \
--cc=buildroot@busybox.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox