From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: buildroot@buildroot.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: [Buildroot] [PATCH 2/2] arch/Config.in.x86: add support for x86-64-v2, x86-64-v3, x86-64-v4
Date: Sun, 9 Jan 2022 09:01:23 +0100 [thread overview]
Message-ID: <20220109080124.2271241-2-thomas.petazzoni@bootlin.com> (raw)
In-Reply-To: <20220109080124.2271241-1-thomas.petazzoni@bootlin.com>
In the face of the vast amount of x86-64 CPU architecture variants,
Linux distributions have worked together to define "micro-architecture
levels" in the x86-64 psABI, called x86-64-v2, x86-64-v3 and
x86-64-v4. They standardize a set of CPU features, and GCC since its
version 11.x has support for these micro-architecture levels as
-march= options.
It makes sense to support them in Buildroot, especially for those who
want to build toolchains that aim at targeting a reasonably broad
family of x86-64 processors.
More details:
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex
https://developers.redhat.com/blog/2021/01/05/building-red-hat-enterprise-linux-9-for-the-x86-64-v2-microarchitecture-level
https://www.phoronix.com/scan.php?page=news_item&px=GCC-11-x86-64-Feature-Levels
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
arch/Config.in.x86 | 60 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index 794d808d96..153c8bad38 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -91,6 +91,63 @@ config BR2_x86_x86_64
"Generic CPU with 64-bit extensions" by the GCC
documentation. It is a 64-bit CPU with MMX, SSE and SSE2
support.
+config BR2_x86_x86_64_v2
+ bool "x86-64-v2"
+ select BR2_X86_CPU_HAS_MMX
+ select BR2_X86_CPU_HAS_SSE
+ select BR2_X86_CPU_HAS_SSE2
+ select BR2_X86_CPU_HAS_SSE3
+ select BR2_X86_CPU_HAS_SSSE3
+ select BR2_X86_CPU_HAS_SSE4
+ select BR2_X86_CPU_HAS_SSE42
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
+ help
+ This option corresponds to the x86-64-v2 micro-architecture
+ level, as defined by the x86-64 psABI document, see
+ https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
+
+ It is close to the Nehalem CPU architecture, and is
+ applicable for CPUs that support CMPXCHG16B, LAHF-SAHF,
+ POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3.
+config BR2_x86_x86_64_v3
+ bool "x86-64-v3"
+ select BR2_X86_CPU_HAS_MMX
+ select BR2_X86_CPU_HAS_SSE
+ select BR2_X86_CPU_HAS_SSE2
+ select BR2_X86_CPU_HAS_SSE3
+ select BR2_X86_CPU_HAS_SSSE3
+ select BR2_X86_CPU_HAS_SSE4
+ select BR2_X86_CPU_HAS_SSE42
+ select BR2_X86_CPU_HAS_AVX
+ select BR2_X86_CPU_HAS_AVX2
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
+ help
+ This option corresponds to the x86-64-v3 micro-architecture
+ level, as defined by the x86-64 psABI document, see
+ https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
+
+ It is close to the Haswell CPU architecture, and is
+ applicable for CPUs that support all of x86-64-v2 plus AVX,
+ AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE.
+config BR2_x86_x86_64_v4
+ bool "x86-64-v4"
+ select BR2_X86_CPU_HAS_MMX
+ select BR2_X86_CPU_HAS_SSE
+ select BR2_X86_CPU_HAS_SSE2
+ select BR2_X86_CPU_HAS_SSE3
+ select BR2_X86_CPU_HAS_SSSE3
+ select BR2_X86_CPU_HAS_SSE4
+ select BR2_X86_CPU_HAS_SSE42
+ select BR2_X86_CPU_HAS_AVX
+ select BR2_X86_CPU_HAS_AVX2
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
+ help
+ This option corresponds to the x86-64-v4 micro-architecture
+ level, as defined by the x86-64 psABI document, see
+ https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
+
+ It is applicable for CPUs that support all of x86-64-v3 plus
+ AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL.
config BR2_x86_nocona
bool "nocona"
select BR2_X86_CPU_HAS_MMX
@@ -292,6 +349,9 @@ config BR2_GCC_TARGET_ARCH
default "pentium4" if BR2_x86_pentium4
default "prescott" if BR2_x86_prescott
default "x86-64" if BR2_x86_x86_64
+ default "x86-64-v2" if BR2_x86_x86_64_v2
+ default "x86-64-v3" if BR2_x86_x86_64_v3
+ default "x86-64-v4" if BR2_x86_x86_64_v4
default "nocona" if BR2_x86_nocona
default "core2" if BR2_x86_core2
default "corei7" if BR2_x86_corei7
--
2.33.1
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next prev parent reply other threads:[~2022-01-09 8:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-09 8:01 [Buildroot] [PATCH 1/2] arch/Config.in.x86: add option for -march=x86-64 Thomas Petazzoni
2022-01-09 8:01 ` Thomas Petazzoni [this message]
2022-01-09 10:36 ` [Buildroot] [PATCH 2/2] arch/Config.in.x86: add support for x86-64-v2, x86-64-v3, x86-64-v4 Yann E. MORIN
2022-01-09 10:46 ` Romain Naour
2022-01-09 10:33 ` [Buildroot] [PATCH 1/2] arch/Config.in.x86: add option for -march=x86-64 Yann E. MORIN
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