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From: Thomas Petazzoni via buildroot <buildroot@buildroot.org>
To: Vincent Fazio <vfazio@gmail.com>
Cc: buildroot@buildroot.org
Subject: Re: [Buildroot] [PATCH v2 1/1] arch/Config.in.x86: add Intel and AMD GCC targets
Date: Tue, 1 Aug 2023 00:18:39 +0200	[thread overview]
Message-ID: <20230801001839.58d7ecb1@windsurf> (raw)
In-Reply-To: <20230731191402.1508702-1-vfazio@gmail.com>

Hello Vincent,

On Mon, 31 Jul 2023 14:14:02 -0500
Vincent Fazio <vfazio@gmail.com> wrote:

> Sync the Intel and AMD CPU target list with GCC 13.
> 
> Multiple references are used for flags and synonyms [0] [1] [2] [3].
> 
> For Intel:
>   Add Ivy Bridge, Sierra Forest, Grand Ridge, Knights Landing, Knights
>   Mill, Granite Rapids, and Granite Rapids-D.
> 
>   The Sapphire Rapids CPU target supports Emerald Rapids.
>   The Alder Lake CPU target supports Raptor Lake and Meteor Lake.
> 
>   Note: Knights Landing/Mills are based on Xeon Phi and do support
>   some AVX512 extensions, but not the full subset required by
>   BR2_X86_CPU_HAS_AVX512
> 
> For AMD:
>   Add Bobcat, Bulldozer, Piledriver, Excavator, and Zen 1-4.
> 
> Add a comment to BR2_X86_CPU_HAS_AVX512 to explain the expected
> extensions supported by the CPU. This flag was first selected by
> skylake-avx512 and encompasses what appears to be a standard subset
> across CPUs [3] and chapter 3 of the x86-64 psABI [4]:
>   AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
> 
> CPUs selecting this flag should, at a minimum, support this subset of
> AVX512 extensions.
> 
> [0]: https://gcc.gnu.org/onlinedocs/gcc-13.2.0/gcc/x86-Options.html
> [1]: https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/config/i386/i386.h;hb=refs/tags/releases/gcc-13.2.0
> [2]: https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/common/config/i386/i386-common.cc;hb=refs/tags/releases/gcc-13.2.0
> [3]: https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512
> [4]: https://gitlab.com/x86-psABIs/x86-64-ABI/-/raw/master/x86-64-ABI/low-level-sys-info.tex
> 
> Signed-off-by: Vincent Fazio <vfazio@gmail.com>
> ---
> Changes v1 -> v2:
>   - Clarify the BR2_X86_CPU_HAS_AVX512 comment (suggested by Thomas)
>   - Flesh out the commit message with the additions made
> ---
>  arch/Config.in.x86 | 200 ++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 199 insertions(+), 1 deletion(-)

Applied to master, thanks.

Does this mean we can do:

diff --git a/package/qt6/qt6base/qt6base.mk b/package/qt6/qt6base/qt6base.mk
index e6cf4f14bb..7b520cdf3d 100644
--- a/package/qt6/qt6base/qt6base.mk
+++ b/package/qt6/qt6base/qt6base.mk
@@ -53,9 +53,9 @@ QT6BASE_CONF_OPTS = \
        -DFEATURE_system_zlib=ON \
        -DFEATURE_system_libb2=ON
 
-# x86 optimization options. While we have a BR2_X86_CPU_HAS_AVX512, it
-# is not clear yet how it maps to all the avx512* options of Qt, so we
-# for now keeps them disabled.
+# x86 optimization options. AVX512F, AVX512BW, AVX512CD, AVX512DQ,
+# AVX512VL are implied by BR2_X86_CPU_HAS_AVX512. We don't have
+# options for the other AVX512 extensions.
 QT6BASE_CONF_OPTS += \
        -DFEATURE_sse2=$(if $(BR2_X86_CPU_HAS_SSE2),ON,OFF) \
        -DFEATURE_sse3=$(if $(BR2_X86_CPU_HAS_SSE3),ON,OFF) \
@@ -64,16 +64,16 @@ QT6BASE_CONF_OPTS += \
        -DFEATURE_ssse3=$(if $(BR2_X86_CPU_HAS_SSSE3),ON,OFF) \
        -DFEATURE_avx=$(if $(BR2_X86_CPU_HAS_AVX),ON,OFF) \
        -DFEATURE_avx2=$(if $(BR2_X86_CPU_HAS_AVX2),ON,OFF) \
-       -DFEATURE_avx512bw=OFF \
-       -DFEATURE_avx512cd=OFF \
-       -DFEATURE_avx512dq=OFF \
+       -DFEATURE_avx512bw=$(if $(BR2_X86_CPU_HAS_AVX512),ON,OFF) \
+       -DFEATURE_avx512cd=$(if $(BR2_X86_CPU_HAS_AVX512),ON,OFF) \
+       -DFEATURE_avx512dq=$(if $(BR2_X86_CPU_HAS_AVX512),ON,OFF) \
        -DFEATURE_avx512er=OFF \
-       -DFEATURE_avx512f=OFF \
+       -DFEATURE_avx512f=$(if $(BR2_X86_CPU_HAS_AVX512),ON,OFF) \
        -DFEATURE_avx512ifma=OFF \
        -DFEATURE_avx512pf=OFF \
        -DFEATURE_avx512vbmi=OFF \
        -DFEATURE_avx512vbmi2=OFF \
-       -DFEATURE_avx512vl=OFF \
+       -DFEATURE_avx512vl=$(if $(BR2_X86_CPU_HAS_AVX512),ON,OFF) \
        -DFEATURE_vaes=OFF
 
 define QT6BASE_BUILD_CMDS

 ?

Thanks!

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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  reply	other threads:[~2023-07-31 22:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-30 17:32 [Buildroot] [PATCH 1/1] arch/Config.in.x86: add Intel and AMD GCC targets Vincent Fazio
2023-07-30 21:01 ` Thomas Petazzoni via buildroot
2023-07-30 23:38   ` Vincent Fazio
2023-07-31 19:14 ` [Buildroot] [PATCH v2 " Vincent Fazio
2023-07-31 22:18   ` Thomas Petazzoni via buildroot [this message]
2023-07-31 22:33     ` Vincent Fazio

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