From: Thomas Petazzoni via buildroot <buildroot@buildroot.org>
To: Yu Chien Peter Lin <peterlin@andestech.com>
Cc: ycliang@andestech.com, kilian.zinnecker@mail.de, buildroot@buildroot.org
Subject: Re: [Buildroot] [PATCH v2] configs/andes_ae350_45: Select RVA for AE350 platform
Date: Tue, 22 Aug 2023 21:14:36 +0200 [thread overview]
Message-ID: <20230822211436.5f9af493@windsurf> (raw)
In-Reply-To: <20230815054327.1436-1-peterlin@andestech.com>
Hello,
On Tue, 15 Aug 2023 13:43:27 +0800
Yu Chien Peter Lin <peterlin@andestech.com> wrote:
> Let's select the RVA as Andes 45-series CPUs support
> IMAFDC extensions.
>
> Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> ---
> Changes v1 -> v2:
> - reword commit message
> ---
> configs/andes_ae350_45_defconfig | 1 +
> 1 file changed, 1 insertion(+)
Applied to next, thanks. However, it could be simplified a bit thanks
to recent changes in the RISC-V support. We could have:
@@ -1,9 +1,4 @@
BR2_riscv=y
-BR2_riscv_custom=y
-BR2_RISCV_ISA_RVM=y
-BR2_RISCV_ISA_RVA=y
-BR2_RISCV_ISA_RVF=y
-BR2_RISCV_ISA_RVD=y
BR2_RISCV_ISA_RVC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_0=y
BR2_GLOBAL_PATCH_DIR="board/andes/ae350/patches"
Indeed, now riscv_g still allows to enable the C extension.
Could you have a look into this and submit a patch?
Thanks a lot!
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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prev parent reply other threads:[~2023-08-22 19:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-15 5:43 [Buildroot] [PATCH v2] configs/andes_ae350_45: Select RVA for AE350 platform Yu Chien Peter Lin
2023-08-22 19:14 ` Thomas Petazzoni via buildroot [this message]
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