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[213.209.99.202]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c29de454b88sm246492066b.20.2026.09.17.00.53.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 00:53:36 -0700 (PDT) X-Google-Original-From: Yegor Yefremov To: buildroot@buildroot.org Date: Thu, 17 Sep 2026 09:53:25 +0200 Message-Id: <20260917075326.1256294-3-yegorslists@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260917075326.1256294-1-yegorslists@gmail.com> References: <20260917075326.1256294-1-yegorslists@gmail.com> MIME-Version: 1.0 Subject: [Buildroot] [PATCH 2/3] arch/Config.in.x86: add BR2_X86_CPU_HAS_XOP X-BeenThere: buildroot@buildroot.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Yegor Yefremov via buildroot Reply-To: Yegor Yefremov Cc: Romain Naour , thomas.petazzoni@bootlin.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: buildroot-bounces@buildroot.org Sender: "buildroot" From: Yegor Yefremov The AMD Bulldozer family (bdver1 to bdver4, i.e. bulldozer, piledriver, steamroller and excavator) is the only x86 family implementing the XOP instruction set, together with the equally Bulldozer-specific FMA4 and LWP extensions, and TBM starting with bdver2. All of them were dropped again with Zen. This can be verified with: $ gcc -march=bdver1 -Q --help=target | grep -E '\-m(xop|fma4|tbm|lwp)' -mfma4 [enabled] -mlwp [enabled] -mtbm [disabled] -mxop [enabled] $ gcc -march=bdver2 -Q --help=target | grep -E '\-m(xop|fma4|tbm|lwp)' -mfma4 [enabled] -mlwp [enabled] -mtbm [enabled] -mxop [enabled] with bdver3 and bdver4 behaving like bdver2. Add a hidden BR2_X86_CPU_HAS_XOP capability symbol and select it from those four CPU variants, so that packages which cannot cope with this instruction set can depend on it, instead of listing the CPU variants one by one. The first user is host-qemu, whose TCG engine does not implement XOP. Signed-off-by: Yegor Yefremov Assisted-by: Claude:claude-opus-5 --- arch/Config.in.x86 | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/Config.in.x86 b/arch/Config.in.x86 index 3c4a725360..51b157409f 100644 --- a/arch/Config.in.x86 +++ b/arch/Config.in.x86 @@ -20,6 +20,14 @@ config BR2_X86_CPU_HAS_AVX config BR2_X86_CPU_HAS_AVX2 bool +# BR2_X86_CPU_HAS_XOP is selected by the AMD Bulldozer family (bdver1 +# to bdver4), which is the only family implementing XOP. On those CPUs, +# gcc also enables the equally Bulldozer-specific FMA4 and LWP +# extensions (and TBM starting with bdver2). Those extensions were +# dropped again with Zen. +config BR2_X86_CPU_HAS_XOP + bool + # BR2_X86_CPU_HAS_AVX512 implies the following AVX512 extensions: # AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL # This subset is common to Intel Xeon (excl Xeon Phi), AMD Zen 4, and @@ -604,6 +612,7 @@ config BR2_x86_bulldozer select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 + select BR2_X86_CPU_HAS_XOP config BR2_x86_piledriver bool "piledriver" select BR2_X86_CPU_HAS_MMX @@ -613,6 +622,7 @@ config BR2_x86_piledriver select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 + select BR2_X86_CPU_HAS_XOP config BR2_x86_steamroller bool "steamroller" select BR2_X86_CPU_HAS_MMX @@ -622,6 +632,7 @@ config BR2_x86_steamroller select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 + select BR2_X86_CPU_HAS_XOP select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8 config BR2_x86_excavator bool "excavator" @@ -634,6 +645,7 @@ config BR2_x86_excavator select BR2_X86_CPU_HAS_SSE42 select BR2_X86_CPU_HAS_AVX select BR2_X86_CPU_HAS_AVX2 + select BR2_X86_CPU_HAS_XOP select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 config BR2_x86_zen bool "zen" -- 2.34.1 _______________________________________________ buildroot mailing list buildroot@buildroot.org https://lists.buildroot.org/mailman/listinfo/buildroot