From: guillaume william brs <guillaume.bressaix@gmail.com>
To: buildroot@busybox.net
Subject: [Buildroot] FFTW optimized for ARM and NEON FPU
Date: Mon, 23 Feb 2015 20:57:08 -0700 [thread overview]
Message-ID: <54EBF694.6090705@gmail.com> (raw)
Hello,
I am working on a cortex-a9 (zynq SoC, mainly zc706)
I faced fairly slow computations of FFT using this library with the
default configuration (20MFlops).
I modified package/fftw.mk to optimize the library compilation as long
as an FPU is available,
NEON in this case: this increased the number of MFlops to 500-600.
--
guillaume william bres-saix
software engineer
NIST - Time & Frequency div.
325 Broadway, Boulder, CO 80305.
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next reply other threads:[~2015-02-24 3:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-24 3:57 guillaume william brs [this message]
2015-02-24 9:44 ` [Buildroot] FFTW optimized for ARM and NEON FPU Peter Kümmel
2015-03-15 23:41 ` Yann E. MORIN
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