From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jason Gunthorpe Subject: Re: [PATCH V4 05/18] iommu/ioasid: Redefine IOASID set and allocation APIs Date: Tue, 30 Mar 2021 10:07:55 -0300 Message-ID: <20210330130755.GN2356281@nvidia.com> References: <20210319135432.GT2356281@nvidia.com> <20210319112221.5123b984@jacob-builder> <20210324100246.4e6b8aa1@jacob-builder> <20210324170338.GM2356281@nvidia.com> <20210324151230.466fd47a@jacob-builder> <20210325100236.17241a1c@jacob-builder> <20210325171645.GF2356281@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9s5RX/kaTQLG4ZYwIXZPhAg6lwL5YhEUVyeYSZvZ0hM=; b=HEFVEbCBsqhoaugV0hOZDcCMEYzYsRClOEuU/Rpagb62BUzX+Z1C5W2D9stEcqeiaZuunva6VuWN0WvxJlMlgyUsfJMucHjrM4k/In2/yl8gbwy5KdAqQB32wYRJ9Bz/MdYHgc7BhJx/RHWIEqk29/83sZs4MTz0Yf/1MaF3YeBiypM4UvsrXPHvIUzdIrNgvdkkPLleBfLKdR4GCpqTZFJWw4nT/bysHv+3f8O3MfnBJ99Ut48FemWA5xdrPpKAs3Hle8kFhL9Hh7QxBg07pT8drwZkIPVBdPDY492qx+GkjlbNr3Hm8nrQSVY+2eZJA8g5a1CwIveiXVBne78F4g== Content-Disposition: inline In-Reply-To: List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Sender: "iommu" To: Jean-Philippe Brucker Cc: "Tian, Kevin" , Alex Williamson , Raj Ashok , Jonathan Corbet , Jean-Philippe Brucker , LKML , Dave Jiang , iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, Li Zefan , Johannes Weiner , Tejun Heo , cgroups-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Wu Hao , David Woodhouse On Fri, Mar 26, 2021 at 09:06:42AM +0100, Jean-Philippe Brucker wrote: > It's not inconceivable to have a control queue doing DMA tagged with > PASID. The devices I know either use untagged DMA, or have a choice to use > a PASID. I don't think we should encourage that. A PASID and all the related is so expensive compared to just doing normal untagged kernel DMA. I assume HW has these features because virtualization use cases might use them, eg by using mdev to assign a command queue - then it would need be be contained by a PASID. Jason