From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 354A9346A04 for ; Thu, 19 Feb 2026 15:28:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771514916; cv=none; b=KC9rW4+szSCV+sbkAXW8WES2juDQrDGTU2L0FwaOUoUEtYdLx5ljENeHwq8glA03JuPvF/P9tPuA+qlS34YzAqhReTGdqcQya5Vupe/Sbt2M4KS5NwgXqIshhC1y9WCINKKuxsOn0AwpfucTPbTkzyVgPARHHKjnhmdSa10BVc0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771514916; c=relaxed/simple; bh=y1YfRDaS/B2wxgxzJhU9jwQbs5u5h1dbTcp4HFH8Xe8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=EXo7kf96OHwbI/mT2WSLjvUNncAEc8/7dU+nEH3I/l6FI5gZE/Iodwmh5+g8cf2p7yFmxNTXHBtdkXRZJEykx/Pr42y7mMLHfFG0yS9En1yh0KyfHf7jDsGlkYc6D2mgoZbM1tZIgQRfhLhPqDY0k6CFja1NF12oFwLncxrbhCA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=ICvb1KxB; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ICvb1KxB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1771514914; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=fOn9mbgWLfiu0CBe21NitF6R9PRIUFVeZ7gu3te+hp0=; b=ICvb1KxByhfLSdlB7RyScx1dbs5YQZC6ToGITFqlwan/3b4UfaTLqwCK+zvNAw37Uh9E+x +736xqVE96xHzk8wT4RXOvrZSNkljz5ql8NPMRIDH7ly83god7oN0WOGFWT1hHSeThs5/Z d+OGinNiT4YM7MGBQaUUJ38b5diTULE= Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-79-yXcD8B0TNmmJdn3IohuKgw-1; Thu, 19 Feb 2026 10:28:31 -0500 X-MC-Unique: yXcD8B0TNmmJdn3IohuKgw-1 X-Mimecast-MFC-AGG-ID: yXcD8B0TNmmJdn3IohuKgw_1771514909 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id B545E180025E; Thu, 19 Feb 2026 15:28:28 +0000 (UTC) Received: from tpad.localdomain (unknown [10.96.133.5]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id CA3121955F26; Thu, 19 Feb 2026 15:28:26 +0000 (UTC) Received: by tpad.localdomain (Postfix, from userid 1000) id AD065405281A6; Thu, 19 Feb 2026 12:27:23 -0300 (-03) Date: Thu, 19 Feb 2026 12:27:23 -0300 From: Marcelo Tosatti To: Michal Hocko Cc: Leonardo Bras , linux-kernel@vger.kernel.org, cgroups@vger.kernel.org, linux-mm@kvack.org, Johannes Weiner , Roman Gushchin , Shakeel Butt , Muchun Song , Andrew Morton , Christoph Lameter , Pekka Enberg , David Rientjes , Joonsoo Kim , Vlastimil Babka , Hyeonggon Yoo <42.hyeyoo@gmail.com>, Leonardo Bras , Thomas Gleixner , Waiman Long , Boqun Feng , Frederic Weisbecker Subject: Re: [PATCH 0/4] Introduce QPW for per-cpu operations Message-ID: References: <20260206143430.021026873@redhat.com> Precedence: bulk X-Mailing-List: cgroups@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 On Mon, Feb 16, 2026 at 12:00:55PM +0100, Michal Hocko wrote: > On Sat 14-02-26 19:02:19, Leonardo Bras wrote: > > On Wed, Feb 11, 2026 at 05:38:47PM +0100, Michal Hocko wrote: > > > On Wed 11-02-26 09:01:12, Marcelo Tosatti wrote: > > > > On Tue, Feb 10, 2026 at 03:01:10PM +0100, Michal Hocko wrote: > > > [...] > > > > > What about !PREEMPT_RT? We have people running isolated workloads and > > > > > these sorts of pcp disruptions are really unwelcome as well. They do not > > > > > have requirements as strong as RT workloads but the underlying > > > > > fundamental problem is the same. Frederic (now CCed) is working on > > > > > moving those pcp book keeping activities to be executed to the return to > > > > > the userspace which should be taking care of both RT and non-RT > > > > > configurations AFAICS. > > > > > > > > Michal, > > > > > > > > For !PREEMPT_RT, _if_ you select CONFIG_QPW=y, then there is a kernel > > > > boot option qpw=y/n, which controls whether the behaviour will be > > > > similar (the spinlock is taken on local_lock, similar to PREEMPT_RT). > > > > > > My bad. I've misread the config space of this. > > > > > > > If CONFIG_QPW=n, or kernel boot option qpw=n, then only local_lock > > > > (and remote work via work_queue) is used. > > > > > > > > What "pcp book keeping activities" you refer to ? I don't see how > > > > moving certain activities that happen under SLUB or LRU spinlocks > > > > to happen before return to userspace changes things related > > > > to avoidance of CPU interruption ? > > > > > > Essentially delayed operations like pcp state flushing happens on return > > > to the userspace on isolated CPUs. No locking changes are required as > > > the work is still per-cpu. > > > > > > In other words the approach Frederic is working on is to not change the > > > locking of pcp delayed work but instead move that work into well defined > > > place - i.e. return to the userspace. > > > > > > Btw. have you measure the impact of preempt_disbale -> spinlock on hot > > > paths like SLUB sheeves? > > > > Hi Michal, > > > > I have done some study on this (which I presented on Plumbers 2023): > > https://lpc.events/event/17/contributions/1484/ > > > > Since they are per-cpu spinlocks, and the remote operations are not that > > frequent, as per design of the current approach, we are not supposed to see > > contention (I was not able to detect contention even after stress testing > > for weeks), nor relevant cacheline bouncing. > > > > That being said, for RT local_locks already get per-cpu spinlocks, so there > > is only difference for !RT, which as you mention, does preemtp_disable(): > > > > The performance impact noticed was mostly about jumping around in > > executable code, as inlining spinlocks (test #2 on presentation) took care > > of most of the added extra cycles, adding about 4-14 extra cycles per > > lock/unlock cycle. (tested on memcg with kmalloc test) > > > > Yeah, as expected there is some extra cycles, as we are doing extra atomic > > operations (even if in a local cacheline) in !RT case, but this could be > > enabled only if the user thinks this is an ok cost for reducing > > interruptions. > > > > What do you think? > > The fact that the behavior is opt-in for !RT is certainly a plus. I also > do not expect the overhead to be really be really big. To me, a much > more important question is which of the two approaches is easier to > maintain long term. The pcp work needs to be done one way or the other. > Whether we want to tweak locking or do it at a very well defined time is > the bigger question. > -- > Michal Hocko > SUSE Labs Michal, Again, i don't see how moving operations to happen at return to kernel would help (assuming you are talking about "context_tracking,x86: Defer some IPIs until a user->kernel transition"). The IPIs in the patchset above can be deferred until user->kernel transition because they are TLB flushes, for addresses which do not exist on the address space mapping in userspace. What are the per-CPU objects in SLUB ? struct slab_sheaf { union { struct rcu_head rcu_head; struct list_head barn_list; /* only used for prefilled sheafs */ struct { unsigned int capacity; bool pfmemalloc; }; }; struct kmem_cache *cache; unsigned int size; int node; /* only used for rcu_sheaf */ void *objects[]; }; struct slub_percpu_sheaves { local_trylock_t lock; struct slab_sheaf *main; /* never NULL when unlocked */ struct slab_sheaf *spare; /* empty or full, may be NULL */ struct slab_sheaf *rcu_free; /* for batching kfree_rcu() */ }; Examples of local CPU operation that manipulates the data structures: 1) kmalloc, allocates an object from local per CPU list. 2) kfree, returns an object to local per CPU list. Examples of an operation that would perform changes on the per-CPU lists remotely: kmem_cache_shrink (cache shutdown), kmem_cache_shrink. You can't delay either kmalloc (removal of object from per-CPU freelist), or kfree (return of object from per-CPU freelist), or kmem_cache_shrink or kmem_cache_shrink to return to userspace. What i missing something here? (or do you have something on your mind which i can't see).