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Date: Wed, 11 Oct 2023 13:30:29 +0800
From: Tzung-Bi Shih <tzungbi@kernel.org>
To: "Dustin L. Howett" <dustin@howett.net>
Cc: Benson Leung <bleung@chromium.org>, Guenter Roeck <groeck@chromium.org>,
	chrome-platform@lists.linux.dev, Kieran Levin <ktl@frame.work>,
	Mario Limonciello <Mario.Limonciello@amd.com>
Subject: Re: [PATCH v1 3/4] cros_ec_lpc: add a quirks system, and propagate
 quirks from DMI
Message-ID: <ZSYy9UlN4TWIGAT6@google.com>
References: <20231005160701.19987-1-dustin@howett.net>
 <20231005160701.19987-5-dustin@howett.net>
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In-Reply-To: <20231005160701.19987-5-dustin@howett.net>

On Thu, Oct 05, 2023 at 11:07:01AM -0500, Dustin L. Howett wrote:
> - CROS_EC_LPC_QUIRK_SHORT_HOSTCMD_RESERVATION: only attempt to reserve
>   0xff (rather than 0x100) I/O ports for the host command region

What if it still reserves 0x100 I/O ports for these deivces?

> @@ -34,6 +34,27 @@
>  /* True if ACPI device is present */
>  static bool cros_ec_lpc_acpi_device_found;
>  
> +/* If this quirk is enabled, the driver will only reserve 0xFF I/O ports
> + * (rather than 0x100) for the host command mapped memory region.
> + */
[...]
> +/* If this quirk is enabled, lpc_driver_data.quirk_mmio_memory_base will be used
> + * as the base port for EC mapped memory.
> + */

See https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting

> @@ -363,14 +384,32 @@ static int cros_ec_lpc_probe(struct platform_device *pdev)
>  	acpi_status status;
>  	struct cros_ec_device *ec_dev;
>  	struct cros_ec_lpc *ec_lpc;
> +	struct lpc_driver_data *driver_data;
> +	int region1_size;
>  	u8 buf[2] = {};
>  	int irq, ret;
> +	u32 quirks = 0;
>  
>  	ec_lpc = devm_kzalloc(dev, sizeof(*ec_lpc), GFP_KERNEL);
>  	if (!ec_lpc)
>  		return -ENOMEM;
>  
>  	ec_lpc->mmio_memory_base = EC_LPC_ADDR_MEMMAP;
> +	region1_size = EC_HOST_CMD_REGION_SIZE;

`quirks` doesn't need to initialize; or move it to a more limited scope.
Instead, `region1_size` can just initialize to EC_HOST_CMD_REGION_SIZE.