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Date: Wed, 11 Oct 2023 13:29:08 +0800
From: Tzung-Bi Shih <tzungbi@kernel.org>
To: "Dustin L. Howett" <dustin@howett.net>
Cc: Benson Leung <bleung@chromium.org>, Guenter Roeck <groeck@chromium.org>,
	chrome-platform@lists.linux.dev, Kieran Levin <ktl@frame.work>,
	Mario Limonciello <Mario.Limonciello@amd.com>
Subject: Re: [PATCH v1 0/4] cros_ec: add support for newer versions of the
 Framework Laptop
Message-ID: <ZSYypHZiRXo7qK5_@google.com>
References: <20231005160701.19987-1-dustin@howett.net>
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In-Reply-To: <20231005160701.19987-1-dustin@howett.net>

On Thu, Oct 05, 2023 at 11:06:57AM -0500, Dustin L. Howett wrote:
> However, those devices move the MMIO region for EC memory from the original
> Chrome EC port range of 0x900-0x9FF to 0xE00-0xEFF. In addition, the ACPI node
> for the EC device on these laptops indicates an I/O resource spanning 0x800 to
> 0x8FE when in truth, the device supports communication all the way through
> 0x8FF. 

I don't understand the description about 0x8FF.  From patches in the series,
it looks like 0x8FF is unused if CROS_EC_LPC_QUIRK_SHORT_HOSTCMD_RESERVATION.

> Dustin L. Howett (4):
>   cros_ec_lpc: introduce lpc_driver_data, a priv struct for the lpc
>     device
>   cros_ec_lpc: pass driver_data from DMI down to the device
>   cros_ec_lpc: add a quirks system, and propagate quirks from DMI
>   cros_ec_lpc: add quirks for the Framework Laptop

The series should prefix with "platform/chrome: cros_ec_lpc".