[PATCH 5.10.y-cip 27/28] arm64: dts: renesas: rzg3s-smarc: Enable PCIe

Claudiu
2026-03-11T11:04:40Z

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

commit 73b73af99a49fd7bf0515741734660973fa2002a upstream.

The RZ Smarc Carrier-II board has PCIe headers mounted on it. Enable PCIe
support.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251119143523.977085-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[claudiu.beznea: fixed conflict by dropping I2C1 and USB nodes as these
are not present in v5.10 CIP]
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
index c8800c41b4e7..203656961bdf 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
@@ -123,6 +123,12 @@ da7212: codec@1a {
};
};

+&pcie {
+ pinctrl-0 = <&pcie_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&pinctrl {
audio_clock_pins: audio-clock {
pins = "AUDIO_CLK1", "AUDIO_CLK2";
@@ -150,6 +156,11 @@ key-3-gpio-hog {
line-name = "key-3-gpio-irq";
};

+ pcie_pins: pcie {
+ pinmux = <RZG2L_PORT_PINMUX(13, 2, 2)>, /* PCIE_RST_OUT_B */
+ <RZG2L_PORT_PINMUX(13, 3, 2)>; /* PCIE_CLKREQ_B */
+ };
+
scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */
<RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */
--
2.43.0