Re: [PATCH 5.10.y-cip 05/28] soc: renesas: rz-sysc: Populate readable_reg/writeable_reg in regmap config

Claudiu Beznea
2026-03-25T08:35:53Z

Hi, Pavel,

On 3/24/26 11:26, Pavel Machek wrote:
> Hi1
>
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> commit c432180a7d95081353a96fd6d5bd75b0fc8a27c3 upstream.
>>
>> Not all system controller registers are accessible from Linux. Accessing
>> such registers generates synchronous external abort. Populate the
>> readable_reg and writeable_reg members of the regmap config to inform the
>> regmap core which registers can be accessed. The list will need to be
>> updated whenever new system controller functionality is exported through
>> regmap.
>>
>
>> +++ b/drivers/soc/renesas/r9a08g045-sysc.c
>> @@ -18,7 +37,57 @@ static const struct rz_sysc_soc_id_init_data rzg3s_sysc_soc_id_init_data __initc
>> .specific_id_mask = GENMASK(27, 0),
>> };
>>
>> +static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg)
>> +{
>> + switch (reg) {
>> + case SYS_XSPI_MAP_STAADD_CS0:
>> + case SYS_XSPI_MAP_ENDADD_CS0:
>> + case SYS_XSPI_MAP_STAADD_CS1:
>> + case SYS_XSPI_MAP_ENDADD_CS1:
>> + case SYS_GETH0_CFG:
>> + case SYS_GETH1_CFG:
>> + case SYS_PCIE_CFG:
>> + case SYS_PCIE_MON:
>> + case SYS_PCIE_ERR_MON:
>> + case SYS_PCIE_PHY:
>> + case SYS_I2C0_CFG:
>> + case SYS_I2C1_CFG:
>> + case SYS_I2C2_CFG:
>> + case SYS_I2C3_CFG:
>> + case SYS_I3C_CFG:
>> + case SYS_USB_PWRRDY:
>> + case SYS_PCIE_RST_RSM_B:
>> + return true;
>> + default:
>> + return false;
>> + }
>> +}
>> +
>> +static bool rzg3s_regmap_writeable_reg(struct device *dev, unsigned int reg)
>> +{
>> + switch (reg) {
>> + case SYS_XSPI_MAP_STAADD_CS0:
>> + case SYS_XSPI_MAP_ENDADD_CS0:
>> + case SYS_XSPI_MAP_STAADD_CS1:
>> + case SYS_XSPI_MAP_ENDADD_CS1:
>> + case SYS_PCIE_CFG:
>> + case SYS_PCIE_PHY:
>> + case SYS_I2C0_CFG:
>> + case SYS_I2C1_CFG:
>> + case SYS_I2C2_CFG:
>> + case SYS_I2C3_CFG:
>> + case SYS_I3C_CFG:
>> + case SYS_USB_PWRRDY:
>> + case SYS_PCIE_RST_RSM_B:
>> + return true;
>> + default:
>> + return false;
>> + }
>> +}
>
> I'd not mind refactoring these two so that code could be shared.

OK, I'm going to prepare something for upstream.

Thank you for your review,
Claudiu