[cip-dev] [PATCH 00/10] Add PCI and USB PHY support to iwg20d

[cip-dev] [PATCH 00/10] Add PCI and USB PHY support to iwg20d

[Fabrizio Castro]

This series backports patches necessary to add PCI and USB PHY support
to iWave's iwg20d board.

Thanks,
Fabrizio

Biju Das (7):
  PCI: rcar: Add device tree support for r8a7743/5
  ARM: dts: r8a7743: Add internal PCI bridge nodes
  phy: rcar-gen2: Add r8a7743/5 support
  ARM: dts: r8a7743: Add USB PHY DT support
  ARM: dts: r8a7743: Link PCI USB devices to USB PHY
  ARM: dts: iwg20d-q7: Enable internal PCI
  ARM: dts: iwg20d-q7: Enable USB PHY

Simon Horman (3):
  PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2
  PCI: rcar-gen2: Use gen2 fallback compatibility last
  phy: rcar-gen2: add fallback binding

 .../devicetree/bindings/pci/pci-rcar-gen2.txt      | 15 +++-
 .../devicetree/bindings/phy/rcar-gen2-phy.txt      | 12 ++-
 arch/arm/boot/dts/iwg20d-q7-common.dtsi            | 26 ++++++
 arch/arm/boot/dts/r8a7743.dtsi                     | 95 ++++++++++++++++++++++
 drivers/pci/host/pci-rcar-gen2.c                   |  1 +
 drivers/phy/phy-rcar-gen2.c                        |  1 +
 6 files changed, 145 insertions(+), 5 deletions(-)

-- 
2.7.4

[cip-dev] [PATCH 01/10] PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2

[Fabrizio Castro]

From: Simon Horman <horms+renesas@verge.net.au>

Add fallback compatibility string for R-Car Gen 2 family.  This is in
keeping with the fallback scheme being adopted wherever appropriate for
drivers for Renesas SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
(cherry picked from commit 3517652fda51bfeea3768ba05819744c8ac57d9e)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt | 11 +++++++++--
 drivers/pci/host/pci-rcar-gen2.c                        |  1 +
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
index 7fab84b..3690f68 100644
--- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
+++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
@@ -8,7 +8,14 @@ OHCI and EHCI controllers.
 Required properties:
 - compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
 	      "renesas,pci-r8a7791" for the R8A7791 SoC;
-	      "renesas,pci-r8a7794" for the R8A7794 SoC.
+	      "renesas,pci-r8a7794" for the R8A7794 SoC;
+	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device
+
+
+	      When compatible with the generic version, nodes must list the
+	      SoC-specific version corresponding to the platform first
+	      followed by the generic version.
+
 - reg:	A list of physical regions to access the device: the first is
 	the operational registers for the OHCI/EHCI controllers and the
 	second is for the bridge configuration and control registers.
@@ -27,7 +34,7 @@ Required properties:
 Example SoC configuration:
 
 	pci0: pci at ee090000  {
-		compatible = "renesas,pci-r8a7790";
+		compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
 		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
 		reg = <0x0 0xee090000 0x0 0xc00>,
 		      <0x0 0xee080000 0x0 0x1100>;
diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index c4f64bf..5683e70 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -360,6 +360,7 @@ static int rcar_pci_probe(struct platform_device *pdev)
 }
 
 static struct of_device_id rcar_pci_of_match[] = {
+	{ .compatible = "renesas,pci-rcar-gen2", },
 	{ .compatible = "renesas,pci-r8a7790", },
 	{ .compatible = "renesas,pci-r8a7791", },
 	{ .compatible = "renesas,pci-r8a7794", },
-- 
2.7.4

[cip-dev] [PATCH 02/10] PCI: rcar-gen2: Use gen2 fallback compatibility last

[Fabrizio Castro]

From: Simon Horman <horms+renesas@verge.net.au>

Improve readability by listing fallback compatibility strings after the
more-specific compatibility strings they provide a fallback for.

This does not affect run-time behaviour as it is the order in the DTB that
determines which compatibility string is used.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit 7b99d94277ba49f401b7a5c1ad8a9084cc6c34a6)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 drivers/pci/host/pci-rcar-gen2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index 5683e70..acefff7 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -360,10 +360,10 @@ static int rcar_pci_probe(struct platform_device *pdev)
 }
 
 static struct of_device_id rcar_pci_of_match[] = {
-	{ .compatible = "renesas,pci-rcar-gen2", },
 	{ .compatible = "renesas,pci-r8a7790", },
 	{ .compatible = "renesas,pci-r8a7791", },
 	{ .compatible = "renesas,pci-r8a7794", },
+	{ .compatible = "renesas,pci-rcar-gen2", },
 	{ },
 };
 
-- 
2.7.4

[cip-dev] [PATCH 03/10] PCI: rcar: Add device tree support for r8a7743/5

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Add internal PCI bridge support for r8a7743/5 SoC.  The Renesas RZ/G1[ME]
(R8A7743/5) internal PCI bridge is identical to the R-Car Gen2 family.

This doesn't change the driver, so it does nothing by itself.  But it does
mean that checkpatch won't complain about a future patch that adds
"renesas,pci-r8a7743" to a DT, which helps ensure that shipped DTs use
documented compatibility strings.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
[bhelgaas: add explanatory note]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit c31c83c970165b9f2cb4c0ad6ae89d0a8242cf7b)

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
index 3690f68..421ab0a 100644
--- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
+++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
@@ -6,7 +6,9 @@ AHB. There is one bridge instance per USB port connected to the internal
 OHCI and EHCI controllers.
 
 Required properties:
-- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
+- compatible: "renesas,pci-r8a7743" for the R8A7743 SoC;
+	      "renesas,pci-r8a7745" for the R8A7745 SoC;
+	      "renesas,pci-r8a7790" for the R8A7790 SoC;
 	      "renesas,pci-r8a7791" for the R8A7791 SoC;
 	      "renesas,pci-r8a7794" for the R8A7794 SoC;
 	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device
-- 
2.7.4

[cip-dev] [PATCH 04/10] ARM: dts: r8a7743: Add internal PCI bridge nodes

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Add device nodes for the r8a7743 internal PCI bridge devices.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 46d9cf5202fd8cd266748779c1a941aaeff0dcad)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7743.dtsi | 50 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 8515abf..d90310c 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1184,6 +1184,56 @@
 						     "scifa5";
 			};
 		};
+
+		pci0: pci at ee090000 {
+			compatible = "renesas,pci-r8a7743",
+				     "renesas,pci-rcar-gen2";
+			device_type = "pci";
+			reg = <0 0xee090000 0 0xc00>,
+			      <0 0xee080000 0 0x1100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp7_clks R8A7743_CLK_USB_EHCI>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+
+			bus-range = <0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			ranges = <0x02000000 0 0xee080000 0 0xee080000 0
+				  0x00010000>;
+			interrupt-map-mask = <0xff00 0 0 0x7>;
+			interrupt-map = <
+			    0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+			    0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+			    0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+			>;
+		};
+
+		pci1: pci at ee0d0000 {
+			compatible = "renesas,pci-r8a7743",
+				     "renesas,pci-rcar-gen2";
+			device_type = "pci";
+			reg = <0 0xee0d0000 0 0xc00>,
+			      <0 0xee0c0000 0 0x1100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp7_clks R8A7743_CLK_USB_EHCI>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+
+			bus-range = <1 1>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0
+				  0x00010000>;
+			interrupt-map-mask = <0xff00 0 0 0x7>;
+			interrupt-map = <
+			    0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+			    0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+			    0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+			>;
+		};
 	};
 
 	/* External root clock */
-- 
2.7.4

[cip-dev] [PATCH 05/10] phy: rcar-gen2: Add r8a7743/5 support

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Add USB PHY support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5)
USB PHY is identical to the R-Car Gen2 family.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit f7da4e6d29539bad2c29dd8ccb4ac628fe19f82b)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
index d564ba4..883b915 100644
--- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
@@ -4,7 +4,9 @@ This file provides information on what the device node for the R-Car generation
 2 USB PHY contains.
 
 Required properties:
-- compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
+- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
+	      "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
+	      "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
 	      "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
 	      "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
 - reg: offset and length of the register block.
-- 
2.7.4

[cip-dev] [PATCH 06/10] phy: rcar-gen2: add fallback binding

[Fabrizio Castro]

From: Simon Horman <horms+renesas@verge.net.au>

In the case of Renesas R-Car hardware we know that there are generations of
SoCs, e.g. Gen 2 and Gen 3. But beyond that its not clear what the
relationship between IP blocks might be. For example, I believe that
r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
descendant of the former or vice versa.

We can, however, by examining the documentation and behaviour of the
hardware at run-time observe that the current driver implementation appears
to be compatible with the IP blocks on SoCs within a given generation.

For the above reasons and convenience when enabling new SoCs a
per-generation fallback compatibility string scheme being adopted for
drivers for Renesas SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt | 8 +++++++-
 drivers/phy/phy-rcar-gen2.c                             | 1 +
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
index 883b915..75abc6d 100644
--- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
@@ -9,6 +9,12 @@ Required properties:
 	      "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
 	      "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
 	      "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
+	      "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 compatible device.
+
+	      When compatible with the generic version, nodes must list the
+	      SoC-specific version corresponding to the platform first
+	      followed by the generic version.
+
 - reg: offset and length of the register block.
 - #address-cells: number of address cells for the USB channel subnodes, must
 		  be <1>.
@@ -36,7 +42,7 @@ the USB channel; see the selector meanings below:
 Example (Lager board):
 
 	usb-phy at e6590100 {
-		compatible = "renesas,usb-phy-r8a7790";
+		compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
 		reg = <0 0xe6590100 0 0x100>;
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c
index c7a0599..97d4dd6 100644
--- a/drivers/phy/phy-rcar-gen2.c
+++ b/drivers/phy/phy-rcar-gen2.c
@@ -195,6 +195,7 @@ static const struct of_device_id rcar_gen2_phy_match_table[] = {
 	{ .compatible = "renesas,usb-phy-r8a7790" },
 	{ .compatible = "renesas,usb-phy-r8a7791" },
 	{ .compatible = "renesas,usb-phy-r8a7794" },
+	{ .compatible = "renesas,rcar-gen2-usb-phy" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, rcar_gen2_phy_match_table);
-- 
2.7.4

[cip-dev] [PATCH 07/10] ARM: dts: r8a7743: Add USB PHY DT support

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Define the r8a7743 generic part of the USB PHY device node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 9412c391af67fc8aa4e2d8975ba6143cd5289296)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7743.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index d90310c..be8881a 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1185,6 +1185,27 @@
 			};
 		};
 
+		usbphy: usb-phy at e6590100 {
+			compatible = "renesas,usb-phy-r8a7743",
+				     "renesas,rcar-gen2-usb-phy";
+			reg = <0 0xe6590100 0 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&mstp7_clks R8A7743_CLK_HSUSB>;
+			clock-names = "usbhs";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+
+			usb0: usb-channel at 0 {
+				reg = <0>;
+				#phy-cells = <1>;
+			};
+			usb2: usb-channel at 2 {
+				reg = <2>;
+				#phy-cells = <1>;
+			};
+		};
+
 		pci0: pci at ee090000 {
 			compatible = "renesas,pci-r8a7743",
 				     "renesas,pci-rcar-gen2";
-- 
2.7.4

[cip-dev] [PATCH 08/10] ARM: dts: r8a7743: Link PCI USB devices to USB PHY

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 96963454655c10663f1bc2eea57ac734cab171a7)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7743.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index be8881a..1b17a20 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1229,6 +1229,18 @@
 			    0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 			    0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 			>;
+
+			usb at 1,0 {
+				reg = <0x800 0 0 0 0>;
+				phys = <&usb0 0>;
+				phy-names = "usb";
+			};
+
+			usb at 2,0 {
+				reg = <0x1000 0 0 0 0>;
+				phys = <&usb0 0>;
+				phy-names = "usb";
+			};
 		};
 
 		pci1: pci at ee0d0000 {
@@ -1254,6 +1266,18 @@
 			    0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 			    0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 			>;
+
+			usb at 1,0 {
+				reg = <0x10800 0 0 0 0>;
+				phys = <&usb2 0>;
+				phy-names = "usb";
+			};
+
+			usb at 2,0 {
+				reg = <0x11000 0 0 0 0>;
+				phys = <&usb2 0>;
+				phy-names = "usb";
+			};
 		};
 	};
 
-- 
2.7.4

[cip-dev] [PATCH 09/10] ARM: dts: iwg20d-q7: Enable internal PCI

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 35a8eeeac89c56435277fa76f8d557bf00530320)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index 5dec247..ecd7bd8 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -98,6 +98,28 @@
 		function = "sdhi1";
 		power-source = <3300>;
 	};
+
+	usb0_pins: usb0 {
+		groups = "usb0";
+		function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		groups = "usb1";
+		function = "usb1";
+	};
+};
+
+&pci0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
 };
 
 &scif0 {
-- 
2.7.4

[cip-dev] [PATCH 10/10] ARM: dts: iwg20d-q7: Enable USB PHY

[Fabrizio Castro]

From: Biju Das <biju.das@bp.renesas.com>

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 51be0086e6d2ebb3f0ddbeedab8d7c4232c1c5f6)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index ecd7bd8..fbb5215 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -147,3 +147,7 @@
 	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
+
+&usbphy {
+	status = "okay";
+};
-- 
2.7.4

[cip-dev] [PATCH 06/10] phy: rcar-gen2: add fallback binding

[Ben Hutchings]

On Mon, 2018-03-05 at 11:39 +0000, Fabrizio Castro wrote:
> From: Simon Horman <horms+renesas@verge.net.au>
> 
> In the case of Renesas R-Car hardware we know that there are generations of
> SoCs, e.g. Gen 2 and Gen 3. But beyond that its not clear what the
> relationship between IP blocks might be. For example, I believe that
> r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
> descendant of the former or vice versa.
> 
> We can, however, by examining the documentation and behaviour of the
> hardware at run-time observe that the current driver implementation appears
> to be compatible with the IP blocks on SoCs within a given generation.
> 
> For the above reasons and convenience when enabling new SoCs a
> per-generation fallback compatibility string scheme being adopted for
> drivers for Renesas SoCs.
> 
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
[...]

This is missing a reference to the upstream commit
(7777cb8ba08dabcab8dc0e91ac0a26dde675edb6).

Ben.

-- 
Ben Hutchings
Software Developer, Codethink Ltd.

[cip-dev] [PATCH 06/10] phy: rcar-gen2: add fallback binding

[Fabrizio Castro]

Hi Ben,

> Subject: Re: [cip-dev][PATCH 06/10] phy: rcar-gen2: add fallback binding
>
> [This sender failed our fraud detection checks and may not be who they appear to be. Learn about spoofing at
> http://aka.ms/LearnAboutSpoofing]
>
> On Mon, 2018-03-05 at 11:39 +0000, Fabrizio Castro wrote:
> > From: Simon Horman <horms+renesas@verge.net.au>
> >
> > In the case of Renesas R-Car hardware we know that there are generations of
> > SoCs, e.g. Gen 2 and Gen 3. But beyond that its not clear what the
> > relationship between IP blocks might be. For example, I believe that
> > r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
> > descendant of the former or vice versa.
> >
> > We can, however, by examining the documentation and behaviour of the
> > hardware at run-time observe that the current driver implementation appears
> > to be compatible with the IP blocks on SoCs within a given generation.
> >
> > For the above reasons and convenience when enabling new SoCs a
> > per-generation fallback compatibility string scheme being adopted for
> > drivers for Renesas SoCs.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Acked-by: Rob Herring <robh@kernel.org>
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> [...]
>
> This is missing a reference to the upstream commit
> (7777cb8ba08dabcab8dc0e91ac0a26dde675edb6).

I will send a v2 after series "Add UART support to r8a7743" gets accepted.

Thanks,
Fab

>
> Ben.
>
> --
> Ben Hutchings
> Software Developer, Codethink Ltd.




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

[cip-dev] [PATCH 00/10] Add PCI and USB PHY support to iwg20d

[Ben Hutchings]

I've applied this series, thanks.  I edited in the missing upstream
commit reference.

Ben.

On Mon, 2018-03-05 at 11:39 +0000, Fabrizio Castro wrote:
> This series backports patches necessary to add PCI and USB PHY support
> to iWave's iwg20d board.
> 
> Thanks,
> Fabrizio
> 
> Biju Das (7):
> ? PCI: rcar: Add device tree support for r8a7743/5
> ? ARM: dts: r8a7743: Add internal PCI bridge nodes
> ? phy: rcar-gen2: Add r8a7743/5 support
> ? ARM: dts: r8a7743: Add USB PHY DT support
> ? ARM: dts: r8a7743: Link PCI USB devices to USB PHY
> ? ARM: dts: iwg20d-q7: Enable internal PCI
> ? ARM: dts: iwg20d-q7: Enable USB PHY
> 
> Simon Horman (3):
> ? PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2
> ? PCI: rcar-gen2: Use gen2 fallback compatibility last
> ? phy: rcar-gen2: add fallback binding
> 
> ?.../devicetree/bindings/pci/pci-rcar-gen2.txt??????| 15 +++-
> ?.../devicetree/bindings/phy/rcar-gen2-phy.txt??????| 12 ++-
> ?arch/arm/boot/dts/iwg20d-q7-common.dtsi????????????| 26 ++++++
> ?arch/arm/boot/dts/r8a7743.dtsi?????????????????????| 95 ++++++++++++++++++++++
> ?drivers/pci/host/pci-rcar-gen2.c???????????????????|??1 +
> ?drivers/phy/phy-rcar-gen2.c????????????????????????|??1 +
> ?6 files changed, 145 insertions(+), 5 deletions(-)
> 
-- 
Ben Hutchings
Software Developer, Codethink Ltd.

[cip-dev] [PATCH 00/10] Add PCI and USB PHY support to iwg20d

[Fabrizio Castro]

Hello Ben,

> Subject: Re: [cip-dev][PATCH 00/10] Add PCI and USB PHY support to iwg20d
>
> I've applied this series, thanks.  I edited in the missing upstream
> commit reference.

Thank you for doing this.

Fab

>
> Ben.
>
> On Mon, 2018-03-05 at 11:39 +0000, Fabrizio Castro wrote:
> > This series backports patches necessary to add PCI and USB PHY support
> > to iWave's iwg20d board.
> >
> > Thanks,
> > Fabrizio
> >
> > Biju Das (7):
> >   PCI: rcar: Add device tree support for r8a7743/5
> >   ARM: dts: r8a7743: Add internal PCI bridge nodes
> >   phy: rcar-gen2: Add r8a7743/5 support
> >   ARM: dts: r8a7743: Add USB PHY DT support
> >   ARM: dts: r8a7743: Link PCI USB devices to USB PHY
> >   ARM: dts: iwg20d-q7: Enable internal PCI
> >   ARM: dts: iwg20d-q7: Enable USB PHY
> >
> > Simon Horman (3):
> >   PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2
> >   PCI: rcar-gen2: Use gen2 fallback compatibility last
> >   phy: rcar-gen2: add fallback binding
> >
> >  .../devicetree/bindings/pci/pci-rcar-gen2.txt      | 15 +++-
> >  .../devicetree/bindings/phy/rcar-gen2-phy.txt      | 12 ++-
> >  arch/arm/boot/dts/iwg20d-q7-common.dtsi            | 26 ++++++
> >  arch/arm/boot/dts/r8a7743.dtsi                     | 95 ++++++++++++++++++++++
> >  drivers/pci/host/pci-rcar-gen2.c                   |  1 +
> >  drivers/phy/phy-rcar-gen2.c                        |  1 +
> >  6 files changed, 145 insertions(+), 5 deletions(-)
> >
> --
> Ben Hutchings
> Software Developer, Codethink Ltd.




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.