[cip-dev] [PATCH 4.4.y-cip 08/17] ARM: dts: r8a7744: Add SMP support

[pavel@denx.de (Pavel Machek)]

Hi!

> commit f1546da8a5c8862d1e66835affcfaf9a0c123abc upstream.
> 
> Add DT node for the Advanced Power Management Unit (APMU), add the
> second CPU core, and use "renesas,apmu" as "enable-method".
> 
> Also add cpu1 phandle node to the PMU interrupt-affinity property.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> [biju: removed resets property. Updated power-domains and clocks properties]
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
>  arch/arm/boot/dts/r8a7744.dtsi | 38 ++++++++++++++++++++++++++++++++------
>  1 file changed, 32 insertions(+), 6 deletions(-)


> +			clocks = <&cpg_clocks R8A7744_CLK_Z>;
> +			clock-latency = <300000>; /* 300 us */
> +			power-domains = <&cpg_clocks>;
> +			next-level-cache = <&L2_CA15>;
> +
> +			/* kHz - uV - OPPs unknown yet */
> +			operating-points = <1500000 1000000>,
> +					   <1312500 1000000>,
> +					   <1125000 1000000>,
> +					   < 937500 1000000>,
> +					   < 750000 1000000>,
> +					   < 375000 1000000>;
> +		};

Does this mean this is working progress and voltages will be lowered
for lower frequencies as testing proceeds?

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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