From: pavel@denx.de (Pavel Machek)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 4.19.y-cip 08/39] soc: renesas: r8a7795-sysc: Fix power request conflicts
Date: Wed, 18 Dec 2019 20:32:34 +0100 [thread overview]
Message-ID: <20191218193234.GB15353@amd> (raw)
In-Reply-To: <1576668829-59767-9-git-send-email-biju.das@bp.renesas.com>
Hi!
> This register does not exist on R-Car H3 ES1.x and ES2.x.
>
> Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>.
So you are storing bitfield in the pointer, ok.
> - { .soc_id = "r8a7795", .revision = "ES1.*" },
> +#define HAS_A2VC0 BIT(0) /* Power domain A2VC0 is present */
> +#define NO_EXTMASK BIT(1) /* Missing SYSCEXTMASK register */
> +
> +static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = {
> + {
> + .soc_id = "r8a7795", .revision = "ES1.*",
> + .data = (void *)(HAS_A2VC0 | NO_EXTMASK),
> + }, {
> + .soc_id = "r8a7795", .revision = "ES2.*",
> + .data = (void *)(NO_EXTMASK),
> + },
> { /* sentinel */ }
> };
>
> static int __init r8a7795_sysc_init(void)
> {
> - if (!soc_device_match(r8a7795es1))
> + const struct soc_device_attribute *attr;
> + u32 quirks = 0;
> +
> + attr = soc_device_match(r8a7795_quirks_match);
> + if (attr)
> + quirks = (uintptr_t)attr->data;
But now you do strange dance with types. I'd understand quirks being
unsigned long (because that's same size as void *). I also could
understand quirks being uintptr_t in the first place (but we normally
use unsigned long for that in the kernel).
But having it as u32, then casting it over uintptr_t is strange.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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next prev parent reply other threads:[~2019-12-18 19:32 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-18 11:33 [cip-dev] [PATCH 4.19.y-cip 00/39] Add RZ/G2N SYSC/RST/Clock/PFC support Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 01/39] dt-bindings: arm: renesas: Document RZ/G2N SoC DT bindings Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 02/39] dt-bindings: arm: renesas: Add HopeRun RZ/G2N boards Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 03/39] soc: renesas: Add Renesas R8A774B1 config option Biju Das
2019-12-18 19:28 ` Pavel Machek
2019-12-19 7:41 ` Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 04/39] soc: renesas: Identify RZ/G2N Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 05/39] dt-bindings: power: Add r8a774b1 SYSC power domain definitions Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 06/39] dt-bindings: power: rcar-sysc: Document r8a774b1 sysc Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 07/39] soc: renesas: rcar-sysc: Prepare for fixing power request conflicts Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 08/39] soc: renesas: r8a7795-sysc: Fix " Biju Das
2019-12-18 19:32 ` Pavel Machek [this message]
2019-12-19 7:43 ` Biju Das
2019-12-19 9:44 ` Geert Uytterhoeven
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 09/39] soc: renesas: r8a7796-sysc: " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 10/39] soc: renesas: r8a77965-sysc: " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 11/39] soc: renesas: r8a77970-sysc: " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 12/39] soc: renesas: r8a77980-sysc: " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 13/39] soc: renesas: r8a77990-sysc: " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 14/39] soc: renesas: r8a774c0-sysc: " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 15/39] soc: renesas: rcar-sysc: Add r8a774b1 support Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 16/39] dt-bindings: reset: rcar-rst: Document r8a774b1 reset module Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 17/39] soc: renesas: rcar-rst: Add support for RZ/G2N Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 18/39] dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 19/39] dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 20/39] clk: renesas: cpg-mssr: Add r8a774b1 support Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 21/39] pinctrl: sh-pfc: r8a77965: Add SATA pins, groups and functions Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 22/39] pinctrl: sh-pfc: r8a77965: Add Audio clock pin support Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 23/39] pinctrl: sh-pfc: r8a77965: Add Audio SSI " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 24/39] pinctrl: sh-pfc: r8a77965: Add VIN[4|5] groups/functions Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 25/39] pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 26/39] pinctrl: sh-pfc: r8a77965: Add CAN FD " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 27/39] pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3 Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 28/39] pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 29/39] pinctrl: sh-pfc: r8a77965: Add DRIF " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 30/39] pinctrl: sh-pfc: r8a77965: Add I2C{0, 3, 5} " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 31/39] pinctrl: sh-pfc: r8a77965: Add TPU " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 32/39] pinctrl: sh-pfc: r8a77965: Use new macros for non-GPIO pins Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 33/39] dt-bindings: pinctrl: sh-pfc: Document r8a774b1 PFC support Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 34/39] pinctrl: sh-pfc: r8a77965: Add R8A774B1 " Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 35/39] pinctrl: sh-pfc: pfc-r8a77965: Fix typo in pinmux macro for SCL3 Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 36/39] dt-bindings: serial: sh-sci: Document r8a774b1 bindings Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 37/39] arm64: dts: renesas: Initial r8a774b1 SoC device tree Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 38/39] arm64: dts: renesas: Add HiHope RZ/G2N main board support Biju Das
2019-12-18 11:33 ` [cip-dev] [PATCH 4.19.y-cip 39/39] arm64: defconfig: Enable R8A774B1 SoC Biju Das
2019-12-18 19:34 ` [cip-dev] [PATCH 4.19.y-cip 00/39] Add RZ/G2N SYSC/RST/Clock/PFC support Pavel Machek
2019-12-19 8:26 ` nobuhiro1.iwamatsu at toshiba.co.jp
2019-12-19 12:20 ` Pavel Machek
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