Hi!

> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> commit 32897e6fff196a5de4981030466ae391dfe56c7b upstream.
> 
> The AXI and CHI clocks use the same register bit for controlling clock
> output. Add a new clock type for coupled clocks, which sets the
> CPG_CLKON_ETH.CLK[01]_ON bit when at least one clock is enabled, and
> clears the bit only when both clocks are disabled.

So the clocks can have different properties (frequency?), but can only
be enabled/disabled together? So  we can't handle them as one clock?

Best regards,
								Pavel
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