Hi!

> commit d1189991c823b50990291c8157b56fb141c47155 upstream.
> 
> Add helper functions to read/read modify write pin config.
> 
> Switch to use helper functions for pins supporting PIN_CONFIG_INPUT_ENABLE
> capabilities.

Along with refactoring code, this also removes locking from the
reads. Which is okay AFAICT, but note in changelog would not hurt.

Best regards,
								Pavel

> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -424,6 +424,39 @@ static int rzg2l_dt_node_to_map(struct pinctrl_dev *pctldev,
>  	return ret;
>  }
>  
> +static u32 rzg2l_read_pin_config(struct rzg2l_pinctrl *pctrl, u32 offset,
> +				 u8 bit, u32 mask)
> +{
> +	void __iomem *addr = pctrl->base + offset;
> +
> +	/* handle _L/_H for 32-bit register read/write */
> +	if (bit >= 4) {
> +		bit -= 4;
> +		addr += 4;
> +	}
> +
> +	return (readl(addr) >> (bit * 8)) & mask;
> +}
> +
> @@ -452,17 +485,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
>  	case PIN_CONFIG_INPUT_ENABLE:
>  		if (!(cfg & PIN_CFG_IEN))
>  			return -EINVAL;
> -		spin_lock_irqsave(&pctrl->lock, flags);
> -		/* handle _L/_H for 32-bit register read/write */
> -		addr = pctrl->base + IEN(port_offset);
> -		if (bit >= 4) {
> -			bit -= 4;
> -			addr += 4;
> -		}
> -
> -		reg = readl(addr) & (IEN_MASK << (bit * 8));
> -		arg = (reg >> (bit * 8)) & 0x1;
> -		spin_unlock_irqrestore(&pctrl->lock, flags);
> +		arg = rzg2l_read_pin_config(pctrl, IEN(port_offset), bit, IEN_MASK);
>  		break;
>  
>  	case PIN_CONFIG_POWER_SOURCE: {

-- 
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