public inbox for cip-dev@lists.cip-project.org
 help / color / mirror / Atom feed
From: Pavel Machek <pavel@denx.de>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>,
	Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 5.10.y-cip 00/29] Add RSPI/OSTM/WDT/TSU/OPP support to Renesas RZ/G2L SoC
Date: Tue, 5 Apr 2022 01:10:40 +0200	[thread overview]
Message-ID: <20220404231039.GA19122@amd> (raw)
In-Reply-To: <20220404123553.25851-1-prabhakar.mahadev-lad.rj@bp.renesas.com>

[-- Attachment #1: Type: text/plain, Size: 519 bytes --]

Hi!

> This patch series adds support for following to Renesas RZ/RGL SoC:
> * RSPI
> * WDT
> * OSTM
> * TSU/OPP/IPA
> 
> All the patches have been cherry-picked from v5.17 release.

Thanks for the series. It passes testing and I do not see any problems
that would prevent merge. I can merge it if there are no other
comments.

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 181 bytes --]

  parent reply	other threads:[~2022-04-04 23:51 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-04 12:35 [PATCH 5.10.y-cip 00/29] Add RSPI/OSTM/WDT/TSU/OPP support to Renesas RZ/G2L SoC Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 01/29] clk: renesas: r9a07g044: Add RSPI clock and reset entries Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 02/29] spi: dt-bindings: renesas,rspi: Document RZ/G2L SoC Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 03/29] spi: spi-rspi: Add support to deassert/assert reset line Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 04/29] spi: spi-rspi: Drop redeclaring ret variable in qspi_transfer_in() Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 05/29] arm64: dts: renesas: r9a07g044: Add RSPI{0,1,2} nodes Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 06/29] arm64: dts: renesas: rzg2l-smarc: Enable RSPI1 on carrier board Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 07/29] clk: renesas: r9a07g044: Add WDT clock and reset entries Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 08/29] clk: renesas: r9a07g044: Rename CLK_PLL2_DIV16 and CLK_PLL2_DIV20 macros Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 09/29] dt-bindings: watchdog: renesas,wdt: Add support for RZ/G2L Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 10/29] units: Add SI metric prefix definitions Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 11/29] watchdog: Add Watchdog Timer driver for RZ/G2L Lad Prabhakar
2022-04-05 18:59   ` Pavel Machek
2022-04-06  8:52     ` Prabhakar Mahadev Lad
2022-04-04 12:35 ` [PATCH 5.10.y-cip 12/29] clk: renesas: r9a07g044: Add OSTM clock and reset entries Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 13/29] dt-bindings: timer: renesas: ostm: Document Renesas RZ/G2L OSTM Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 14/29] reset: Add of_reset_control_get_optional_exclusive() Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 15/29] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 16/29] clocksource/drivers/renesas,ostm: Make RENESAS_OSTM symbol visible Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 17/29] arm64: dts: renesas: r9a07g044: Add OSTM nodes Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 18/29] arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 19/29] arm64: dts: renesas: r9a07g044: Add WDT nodes Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 20/29] arm64: dts: renesas: rzg2l-smarc-som: Enable watchdog Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 21/29] clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 22/29] clk: renesas: r9a07g044: Add TSU clock and reset entry Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 23/29] clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro Lad Prabhakar
2022-04-05 19:01   ` Pavel Machek
2022-04-06  8:54     ` Prabhakar Mahadev Lad
2022-04-04 12:35 ` [PATCH 5.10.y-cip 24/29] clk: renesas: rzg2l: Add CPG_PL1_DDIV macro Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 25/29] dt-bindings: thermal: Document Renesas RZ/G2L TSU Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 26/29] thermal/drivers: Add TSU driver for RZ/G2L Lad Prabhakar
2022-04-05 19:06   ` Pavel Machek
2022-04-06  8:58     ` Prabhakar Mahadev Lad
2022-04-04 12:35 ` [PATCH 5.10.y-cip 27/29] arm64: dts: renesas: r9a07g044: Add OPP table Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 28/29] arm64: dts: renesas: r9a07g044: Add TSU node Lad Prabhakar
2022-04-04 12:35 ` [PATCH 5.10.y-cip 29/29] arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA Lad Prabhakar
2022-04-04 23:10 ` Pavel Machek [this message]
2022-04-05  7:45 ` [PATCH 5.10.y-cip 00/29] Add RSPI/OSTM/WDT/TSU/OPP support to Renesas RZ/G2L SoC nobuhiro1.iwamatsu
2022-04-05  7:59   ` Prabhakar Mahadev Lad

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220404231039.GA19122@amd \
    --to=pavel@denx.de \
    --cc=biju.das.jz@bp.renesas.com \
    --cc=cip-dev@lists.cip-project.org \
    --cc=nobuhiro1.iwamatsu@toshiba.co.jp \
    --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox