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From: Tobias Schaffner <tobias.schaffner@siemens.com>
To: pavel@nabladev.com
Cc: cip-dev@lists.cip-project.org,
	nobuhiro.iwamatsu.x90@mail.toshiba,
	Jan Kiszka <jan.kiszka@siemens.com>,
	Jan Altenberg <jan.altenberg@osadl.org>
Subject: Re: [cip-dev] preempt_rt on BeagleV-Fire
Date: Fri, 9 Jan 2026 12:08:59 +0100	[thread overview]
Message-ID: <2f854acc-e08e-4405-b9fb-dfb71015a75f@siemens.com> (raw)
In-Reply-To: <aWDRYgwxThmOyGPr@duo.ucw.cz>

Hi Pavel,

On 1/9/26 10:58, Pavel Machek via lists.cip-project.org wrote:
> Hi!
> 
>> has anyone already tested preempt_rt on the BeagleV-Fire?
>>
>> OSADL has evaluated preempt_rt on both the PolarFire Icicle Kit
>> (MPFS250T) and the PolarFire Discovery Kit (MPFS095T) and has reported
>> rather problematic latency results so far[1].
>>
>> Since the BeagleV-Fire is also based on a PolarFire SoC (MPFS025T), I
>> suspect we might run into similar issues. Any experiences, measurements,
>> or insights would be greatly appreciated.
> 
> Those OSADL results actually look good to me :-).
> 
> Ok, so let me explain. BeagleV-Fire seems to have slow CPUs. Like
> "Nokia N900" slow. That's TI OMAP 3430 SoC, 600 MHz ARM Cortex-A8 CPU
> from 2010 or so.
> 
> It is certainly less than 10% of speed of Core i9-9900K, and that one
> reaches 100usec...
> 
> https://www.osadl.org/Latency-plot-of-system-in-rack-0-slot.qa-latencyplot-r0s5.0.html?latencies=&showno=&shadow=1&slider=360
> 
> ...so 350usec is actually not that bad, AFAICT.

I cannot see any CPU isolation in the profile data for the Core 
i9-9900K. Maybe they are using cgroups here, and this is not visible.

Comparing the isolated cores of the VisionFive2 @ 1500 MHz [1] to the 
MPFS250T @ 600 MHz [2], it is more like 45 µs to 250 µs.

Your point is still valid. The gap may not be as large as it looks at 
first glance, but I don’t think the difference in frequency explains it 
completely.

Best,
Tobias

[1] 
https://www.osadl.org/Latency-plot-of-system-in-rack-3-slot.qa-latencyplot-r3s2.0.html?shadow=1
[2] 
https://www.osadl.org/Latency-plot-of-system-in-rack-7-slot.qa-latencyplot-r7s2.0.html?shadow=1

> Not sure what our requirements are, sometimes people put the
> time-critical stuff into FPGA.
> 
> Best regards,
> 								Pavel
> 
> 
> 
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      reply	other threads:[~2026-01-09 11:09 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-08  8:53 preempt_rt on BeagleV-Fire Tobias Schaffner
2026-01-09  9:58 ` [cip-dev] " Pavel Machek
2026-01-09 11:08   ` Tobias Schaffner [this message]

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