* [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-16 9:08 ` Pavel Machek
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 02/13] units: Add SI metric prefix definitions Biju Das
` (12 subsequent siblings)
13 siblings, 1 reply; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
commit aa6159ab99a9ab5df835b4750b66cf132a5aa292 upstream
kernel.h is being used as a dump for all kinds of stuff for a long time.
Here is the attempt to start cleaning it up by splitting out
mathematical helpers.
At the same time convert users in header and lib folder to use new
header. Though for time being include new header back to kernel.h to
avoid twisted indirected includes for existing users.
[sfr@canb.auug.org.au: fix powerpc build]
Link: https://lkml.kernel.org/r/20201029150809.13059608@canb.auug.org.au
Link: https://lkml.kernel.org/r/20201028173212.41768-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "Paul E. McKenney" <paulmck@kernel.org>
Cc: Trond Myklebust <trond.myklebust@hammerspace.com>
Cc: Jeff Layton <jlayton@kernel.org>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
[biju: manually applied trivial change]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
fs/nfs/callback_proc.c | 5 +
include/linux/bitops.h | 11 ++-
include/linux/dcache.h | 1 +
include/linux/iommu-helper.h | 4 +-
include/linux/kernel.h | 173 +--------------------------------
include/linux/math.h | 177 ++++++++++++++++++++++++++++++++++
include/linux/rcu_node_tree.h | 2 +
include/linux/units.h | 2 +-
lib/errname.c | 1 +
lib/errseq.c | 1 +
lib/find_bit.c | 3 +-
lib/math/div64.c | 4 +-
lib/math/int_pow.c | 2 +-
lib/math/int_sqrt.c | 3 +-
lib/math/reciprocal_div.c | 9 +-
15 files changed, 215 insertions(+), 183 deletions(-)
create mode 100644 include/linux/math.h
diff --git a/fs/nfs/callback_proc.c b/fs/nfs/callback_proc.c
index bfdd21224073..ccf313238441 100644
--- a/fs/nfs/callback_proc.c
+++ b/fs/nfs/callback_proc.c
@@ -6,10 +6,15 @@
*
* NFSv4 callback procedures
*/
+
+#include <linux/errno.h>
+#include <linux/math.h>
#include <linux/nfs4.h>
#include <linux/nfs_fs.h>
#include <linux/slab.h>
#include <linux/rcupdate.h>
+#include <linux/types.h>
+
#include "nfs4_fs.h"
#include "callback.h"
#include "delegation.h"
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 5b74bdf159d6..a61f192c096b 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -1,9 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _LINUX_BITOPS_H
#define _LINUX_BITOPS_H
+
#include <asm/types.h>
#include <linux/bits.h>
+#include <uapi/linux/kernel.h>
+
/* Set bits in the first 'n' bytes when loaded from memory */
#ifdef __LITTLE_ENDIAN
# define aligned_byte_mask(n) ((1UL << 8*(n))-1)
@@ -12,10 +15,10 @@
#endif
#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE)
-#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_TYPE(long))
-#define BITS_TO_U64(nr) DIV_ROUND_UP(nr, BITS_PER_TYPE(u64))
-#define BITS_TO_U32(nr) DIV_ROUND_UP(nr, BITS_PER_TYPE(u32))
-#define BITS_TO_BYTES(nr) DIV_ROUND_UP(nr, BITS_PER_TYPE(char))
+#define BITS_TO_LONGS(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(long))
+#define BITS_TO_U64(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u64))
+#define BITS_TO_U32(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u32))
+#define BITS_TO_BYTES(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(char))
extern unsigned int __sw_hweight8(unsigned int w);
extern unsigned int __sw_hweight16(unsigned int w);
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 6f95c3300cbb..d7b369fc15d3 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -4,6 +4,7 @@
#include <linux/atomic.h>
#include <linux/list.h>
+#include <linux/math.h>
#include <linux/rculist.h>
#include <linux/rculist_bl.h>
#include <linux/spinlock.h>
diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h
index 70d01edcbf8b..74be34f3a20a 100644
--- a/include/linux/iommu-helper.h
+++ b/include/linux/iommu-helper.h
@@ -3,7 +3,9 @@
#define _LINUX_IOMMU_HELPER_H
#include <linux/bug.h>
-#include <linux/kernel.h>
+#include <linux/log2.h>
+#include <linux/math.h>
+#include <linux/types.h>
static inline unsigned long iommu_device_max_index(unsigned long size,
unsigned long offset,
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index f5392d96d688..0586f87dab73 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -2,7 +2,6 @@
#ifndef _LINUX_KERNEL_H
#define _LINUX_KERNEL_H
-
#include <stdarg.h>
#include <linux/limits.h>
#include <linux/linkage.h>
@@ -11,12 +10,14 @@
#include <linux/compiler.h>
#include <linux/bitops.h>
#include <linux/log2.h>
+#include <linux/math.h>
#include <linux/minmax.h>
#include <linux/typecheck.h>
#include <linux/printk.h>
#include <linux/build_bug.h>
+
#include <asm/byteorder.h>
-#include <asm/div64.h>
+
#include <uapi/linux/kernel.h>
#define STACK_MAGIC 0xdeadbeef
@@ -54,125 +55,11 @@
} \
)
-/*
- * This looks more complex than it should be. But we need to
- * get the type for the ~ right in round_down (it needs to be
- * as wide as the result!), and we want to evaluate the macro
- * arguments just once each.
- */
-#define __round_mask(x, y) ((__typeof__(x))((y)-1))
-/**
- * round_up - round up to next specified power of 2
- * @x: the value to round
- * @y: multiple to round up to (must be a power of 2)
- *
- * Rounds @x up to next multiple of @y (which must be a power of 2).
- * To perform arbitrary rounding up, use roundup() below.
- */
-#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
-/**
- * round_down - round down to next specified power of 2
- * @x: the value to round
- * @y: multiple to round down to (must be a power of 2)
- *
- * Rounds @x down to next multiple of @y (which must be a power of 2).
- * To perform arbitrary rounding down, use rounddown() below.
- */
-#define round_down(x, y) ((x) & ~__round_mask(x, y))
-
#define typeof_member(T, m) typeof(((T*)0)->m)
-#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP
-
-#define DIV_ROUND_DOWN_ULL(ll, d) \
- ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
-
-#define DIV_ROUND_UP_ULL(ll, d) \
- DIV_ROUND_DOWN_ULL((unsigned long long)(ll) + (d) - 1, (d))
-
-#if BITS_PER_LONG == 32
-# define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d)
-#else
-# define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP(ll,d)
-#endif
-
-/**
- * roundup - round up to the next specified multiple
- * @x: the value to up
- * @y: multiple to round up to
- *
- * Rounds @x up to next multiple of @y. If @y will always be a power
- * of 2, consider using the faster round_up().
- */
-#define roundup(x, y) ( \
-{ \
- typeof(y) __y = y; \
- (((x) + (__y - 1)) / __y) * __y; \
-} \
-)
-/**
- * rounddown - round down to next specified multiple
- * @x: the value to round
- * @y: multiple to round down to
- *
- * Rounds @x down to next multiple of @y. If @y will always be a power
- * of 2, consider using the faster round_down().
- */
-#define rounddown(x, y) ( \
-{ \
- typeof(x) __x = (x); \
- __x - (__x % (y)); \
-} \
-)
-
-/*
- * Divide positive or negative dividend by positive or negative divisor
- * and round to closest integer. Result is undefined for negative
- * divisors if the dividend variable type is unsigned and for negative
- * dividends if the divisor variable type is unsigned.
- */
-#define DIV_ROUND_CLOSEST(x, divisor)( \
-{ \
- typeof(x) __x = x; \
- typeof(divisor) __d = divisor; \
- (((typeof(x))-1) > 0 || \
- ((typeof(divisor))-1) > 0 || \
- (((__x) > 0) == ((__d) > 0))) ? \
- (((__x) + ((__d) / 2)) / (__d)) : \
- (((__x) - ((__d) / 2)) / (__d)); \
-} \
-)
-/*
- * Same as above but for u64 dividends. divisor must be a 32-bit
- * number.
- */
-#define DIV_ROUND_CLOSEST_ULL(x, divisor)( \
-{ \
- typeof(divisor) __d = divisor; \
- unsigned long long _tmp = (x) + (__d) / 2; \
- do_div(_tmp, __d); \
- _tmp; \
-} \
-)
-
-/*
- * Multiplies an integer by a fraction, while avoiding unnecessary
- * overflow or loss of precision.
- */
-#define mult_frac(x, numer, denom)( \
-{ \
- typeof(x) quot = (x) / (denom); \
- typeof(x) rem = (x) % (denom); \
- (quot * (numer)) + ((rem * (numer)) / (denom)); \
-} \
-)
-
-
#define _RET_IP_ (unsigned long)__builtin_return_address(0)
#define _THIS_IP_ ({ __label__ __here; __here: (unsigned long)&&__here; })
-#define sector_div(a, b) do_div(a, b)
-
/**
* upper_32_bits - return bits 32-63 of a number
* @n: the number we're accessing
@@ -265,48 +152,6 @@ extern void __cant_sleep(const char *file, int line, int preempt_offset);
# define cant_migrate() do { } while (0)
#endif
-/**
- * abs - return absolute value of an argument
- * @x: the value. If it is unsigned type, it is converted to signed type first.
- * char is treated as if it was signed (regardless of whether it really is)
- * but the macro's return type is preserved as char.
- *
- * Return: an absolute value of x.
- */
-#define abs(x) __abs_choose_expr(x, long long, \
- __abs_choose_expr(x, long, \
- __abs_choose_expr(x, int, \
- __abs_choose_expr(x, short, \
- __abs_choose_expr(x, char, \
- __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(x), char), \
- (char)({ signed char __x = (x); __x<0?-__x:__x; }), \
- ((void)0)))))))
-
-#define __abs_choose_expr(x, type, other) __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(x), signed type) || \
- __builtin_types_compatible_p(typeof(x), unsigned type), \
- ({ signed type __x = (x); __x < 0 ? -__x : __x; }), other)
-
-/**
- * reciprocal_scale - "scale" a value into range [0, ep_ro)
- * @val: value
- * @ep_ro: right open interval endpoint
- *
- * Perform a "reciprocal multiplication" in order to "scale" a value into
- * range [0, @ep_ro), where the upper interval endpoint is right-open.
- * This is useful, e.g. for accessing a index of an array containing
- * @ep_ro elements, for example. Think of it as sort of modulus, only that
- * the result isn't that of modulo. ;) Note that if initial input is a
- * small value, then result will return 0.
- *
- * Return: a result based on @val in interval [0, @ep_ro).
- */
-static inline u32 reciprocal_scale(u32 val, u32 ep_ro)
-{
- return (u32)(((u64) val * ep_ro) >> 32);
-}
-
#if defined(CONFIG_MMU) && \
(defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP))
#define might_fault() __might_fault(__FILE__, __LINE__)
@@ -508,18 +353,6 @@ extern int __kernel_text_address(unsigned long addr);
extern int kernel_text_address(unsigned long addr);
extern int func_ptr_is_kernel_text(void *ptr);
-u64 int_pow(u64 base, unsigned int exp);
-unsigned long int_sqrt(unsigned long);
-
-#if BITS_PER_LONG < 64
-u32 int_sqrt64(u64 x);
-#else
-static inline u32 int_sqrt64(u64 x)
-{
- return (u32)int_sqrt(x);
-}
-#endif
-
#ifdef CONFIG_SMP
extern unsigned int sysctl_oops_all_cpu_backtrace;
#else
diff --git a/include/linux/math.h b/include/linux/math.h
new file mode 100644
index 000000000000..53674a327e39
--- /dev/null
+++ b/include/linux/math.h
@@ -0,0 +1,177 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _LINUX_MATH_H
+#define _LINUX_MATH_H
+
+#include <asm/div64.h>
+#include <uapi/linux/kernel.h>
+
+/*
+ * This looks more complex than it should be. But we need to
+ * get the type for the ~ right in round_down (it needs to be
+ * as wide as the result!), and we want to evaluate the macro
+ * arguments just once each.
+ */
+#define __round_mask(x, y) ((__typeof__(x))((y)-1))
+
+/**
+ * round_up - round up to next specified power of 2
+ * @x: the value to round
+ * @y: multiple to round up to (must be a power of 2)
+ *
+ * Rounds @x up to next multiple of @y (which must be a power of 2).
+ * To perform arbitrary rounding up, use roundup() below.
+ */
+#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
+
+/**
+ * round_down - round down to next specified power of 2
+ * @x: the value to round
+ * @y: multiple to round down to (must be a power of 2)
+ *
+ * Rounds @x down to next multiple of @y (which must be a power of 2).
+ * To perform arbitrary rounding down, use rounddown() below.
+ */
+#define round_down(x, y) ((x) & ~__round_mask(x, y))
+
+#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP
+
+#define DIV_ROUND_DOWN_ULL(ll, d) \
+ ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
+
+#define DIV_ROUND_UP_ULL(ll, d) \
+ DIV_ROUND_DOWN_ULL((unsigned long long)(ll) + (d) - 1, (d))
+
+#if BITS_PER_LONG == 32
+# define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d)
+#else
+# define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP(ll,d)
+#endif
+
+/**
+ * roundup - round up to the next specified multiple
+ * @x: the value to up
+ * @y: multiple to round up to
+ *
+ * Rounds @x up to next multiple of @y. If @y will always be a power
+ * of 2, consider using the faster round_up().
+ */
+#define roundup(x, y) ( \
+{ \
+ typeof(y) __y = y; \
+ (((x) + (__y - 1)) / __y) * __y; \
+} \
+)
+/**
+ * rounddown - round down to next specified multiple
+ * @x: the value to round
+ * @y: multiple to round down to
+ *
+ * Rounds @x down to next multiple of @y. If @y will always be a power
+ * of 2, consider using the faster round_down().
+ */
+#define rounddown(x, y) ( \
+{ \
+ typeof(x) __x = (x); \
+ __x - (__x % (y)); \
+} \
+)
+
+/*
+ * Divide positive or negative dividend by positive or negative divisor
+ * and round to closest integer. Result is undefined for negative
+ * divisors if the dividend variable type is unsigned and for negative
+ * dividends if the divisor variable type is unsigned.
+ */
+#define DIV_ROUND_CLOSEST(x, divisor)( \
+{ \
+ typeof(x) __x = x; \
+ typeof(divisor) __d = divisor; \
+ (((typeof(x))-1) > 0 || \
+ ((typeof(divisor))-1) > 0 || \
+ (((__x) > 0) == ((__d) > 0))) ? \
+ (((__x) + ((__d) / 2)) / (__d)) : \
+ (((__x) - ((__d) / 2)) / (__d)); \
+} \
+)
+/*
+ * Same as above but for u64 dividends. divisor must be a 32-bit
+ * number.
+ */
+#define DIV_ROUND_CLOSEST_ULL(x, divisor)( \
+{ \
+ typeof(divisor) __d = divisor; \
+ unsigned long long _tmp = (x) + (__d) / 2; \
+ do_div(_tmp, __d); \
+ _tmp; \
+} \
+)
+
+/*
+ * Multiplies an integer by a fraction, while avoiding unnecessary
+ * overflow or loss of precision.
+ */
+#define mult_frac(x, numer, denom)( \
+{ \
+ typeof(x) quot = (x) / (denom); \
+ typeof(x) rem = (x) % (denom); \
+ (quot * (numer)) + ((rem * (numer)) / (denom)); \
+} \
+)
+
+#define sector_div(a, b) do_div(a, b)
+
+/**
+ * abs - return absolute value of an argument
+ * @x: the value. If it is unsigned type, it is converted to signed type first.
+ * char is treated as if it was signed (regardless of whether it really is)
+ * but the macro's return type is preserved as char.
+ *
+ * Return: an absolute value of x.
+ */
+#define abs(x) __abs_choose_expr(x, long long, \
+ __abs_choose_expr(x, long, \
+ __abs_choose_expr(x, int, \
+ __abs_choose_expr(x, short, \
+ __abs_choose_expr(x, char, \
+ __builtin_choose_expr( \
+ __builtin_types_compatible_p(typeof(x), char), \
+ (char)({ signed char __x = (x); __x<0?-__x:__x; }), \
+ ((void)0)))))))
+
+#define __abs_choose_expr(x, type, other) __builtin_choose_expr( \
+ __builtin_types_compatible_p(typeof(x), signed type) || \
+ __builtin_types_compatible_p(typeof(x), unsigned type), \
+ ({ signed type __x = (x); __x < 0 ? -__x : __x; }), other)
+
+/**
+ * reciprocal_scale - "scale" a value into range [0, ep_ro)
+ * @val: value
+ * @ep_ro: right open interval endpoint
+ *
+ * Perform a "reciprocal multiplication" in order to "scale" a value into
+ * range [0, @ep_ro), where the upper interval endpoint is right-open.
+ * This is useful, e.g. for accessing a index of an array containing
+ * @ep_ro elements, for example. Think of it as sort of modulus, only that
+ * the result isn't that of modulo. ;) Note that if initial input is a
+ * small value, then result will return 0.
+ *
+ * Return: a result based on @val in interval [0, @ep_ro).
+ */
+static inline u32 reciprocal_scale(u32 val, u32 ep_ro)
+{
+ return (u32)(((u64) val * ep_ro) >> 32);
+}
+
+u64 int_pow(u64 base, unsigned int exp);
+unsigned long int_sqrt(unsigned long);
+
+#if BITS_PER_LONG < 64
+u32 int_sqrt64(u64 x);
+#else
+static inline u32 int_sqrt64(u64 x)
+{
+ return (u32)int_sqrt(x);
+}
+#endif
+
+#endif /* _LINUX_MATH_H */
diff --git a/include/linux/rcu_node_tree.h b/include/linux/rcu_node_tree.h
index b8e094b125ee..78feb8ba7358 100644
--- a/include/linux/rcu_node_tree.h
+++ b/include/linux/rcu_node_tree.h
@@ -20,6 +20,8 @@
#ifndef __LINUX_RCU_NODE_TREE_H
#define __LINUX_RCU_NODE_TREE_H
+#include <linux/math.h>
+
/*
* Define shape of hierarchy based on NR_CPUS, CONFIG_RCU_FANOUT, and
* CONFIG_RCU_FANOUT_LEAF.
diff --git a/include/linux/units.h b/include/linux/units.h
index aaf716364ec3..5c115c809507 100644
--- a/include/linux/units.h
+++ b/include/linux/units.h
@@ -2,7 +2,7 @@
#ifndef _LINUX_UNITS_H
#define _LINUX_UNITS_H
-#include <linux/kernel.h>
+#include <linux/math.h>
#define ABSOLUTE_ZERO_MILLICELSIUS -273150
diff --git a/lib/errname.c b/lib/errname.c
index 0c4d3e66170e..05cbf731545f 100644
--- a/lib/errname.c
+++ b/lib/errname.c
@@ -3,6 +3,7 @@
#include <linux/errno.h>
#include <linux/errname.h>
#include <linux/kernel.h>
+#include <linux/math.h>
/*
* Ensure these tables do not accidentally become gigantic if some
diff --git a/lib/errseq.c b/lib/errseq.c
index 81f9e33aa7e7..93e9b94358dc 100644
--- a/lib/errseq.c
+++ b/lib/errseq.c
@@ -3,6 +3,7 @@
#include <linux/bug.h>
#include <linux/atomic.h>
#include <linux/errseq.h>
+#include <linux/log2.h>
/*
* An errseq_t is a way of recording errors in one place, and allowing any
diff --git a/lib/find_bit.c b/lib/find_bit.c
index 4a8751010d59..f67f86fd2f62 100644
--- a/lib/find_bit.c
+++ b/lib/find_bit.c
@@ -15,8 +15,9 @@
#include <linux/bitops.h>
#include <linux/bitmap.h>
#include <linux/export.h>
-#include <linux/kernel.h>
+#include <linux/math.h>
#include <linux/minmax.h>
+#include <linux/swab.h>
#if !defined(find_next_bit) || !defined(find_next_zero_bit) || \
!defined(find_next_bit_le) || !defined(find_next_zero_bit_le) || \
diff --git a/lib/math/div64.c b/lib/math/div64.c
index edd1090c9edb..46866394fc84 100644
--- a/lib/math/div64.c
+++ b/lib/math/div64.c
@@ -18,9 +18,11 @@
* or by defining a preprocessor macro in arch/include/asm/div64.h.
*/
+#include <linux/bitops.h>
#include <linux/export.h>
-#include <linux/kernel.h>
+#include <linux/math.h>
#include <linux/math64.h>
+#include <linux/log2.h>
/* Not needed on 64bit architectures */
#if BITS_PER_LONG == 32
diff --git a/lib/math/int_pow.c b/lib/math/int_pow.c
index 622fc1ab3c74..0cf426e69bda 100644
--- a/lib/math/int_pow.c
+++ b/lib/math/int_pow.c
@@ -6,7 +6,7 @@
*/
#include <linux/export.h>
-#include <linux/kernel.h>
+#include <linux/math.h>
#include <linux/types.h>
/**
diff --git a/lib/math/int_sqrt.c b/lib/math/int_sqrt.c
index 30e0f9770f88..a8170bb9142f 100644
--- a/lib/math/int_sqrt.c
+++ b/lib/math/int_sqrt.c
@@ -6,9 +6,10 @@
* square root from Guy L. Steele.
*/
-#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/bitops.h>
+#include <linux/limits.h>
+#include <linux/math.h>
/**
* int_sqrt - computes the integer square root
diff --git a/lib/math/reciprocal_div.c b/lib/math/reciprocal_div.c
index 32436dd4171e..6cb4adbb81d2 100644
--- a/lib/math/reciprocal_div.c
+++ b/lib/math/reciprocal_div.c
@@ -1,10 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
+#include <linux/bitops.h>
#include <linux/bug.h>
-#include <linux/kernel.h>
-#include <asm/div64.h>
-#include <linux/reciprocal_div.h>
#include <linux/export.h>
+#include <linux/limits.h>
+#include <linux/math.h>
#include <linux/minmax.h>
+#include <linux/types.h>
+
+#include <linux/reciprocal_div.h>
/*
* For a description of the algorithm please have a look at
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers Biju Das
@ 2022-07-16 9:08 ` Pavel Machek
2022-07-16 14:16 ` Biju Das
0 siblings, 1 reply; 25+ messages in thread
From: Pavel Machek @ 2022-07-16 9:08 UTC (permalink / raw)
To: Biju Das
Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Chris Paterson,
Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1799 bytes --]
Hi!
> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> commit aa6159ab99a9ab5df835b4750b66cf132a5aa292 upstream
>
> kernel.h is being used as a dump for all kinds of stuff for a long time.
> Here is the attempt to start cleaning it up by splitting out
> mathematical helpers.
>
> At the same time convert users in header and lib folder to use new
> header. Though for time being include new header back to kernel.h to
> avoid twisted indirected includes for existing users.
This is rather intrusive for two lines which we really need, and may
cause rejects in future.
I'd suggest identifying the defines needed by the driver, and just
adding those. kernel.h would be acceptable. Or you can add math.h with
just defines needed, but please avoid code movement.
Best regards,
Pavel
> ---
> fs/nfs/callback_proc.c | 5 +
> include/linux/bitops.h | 11 ++-
> include/linux/dcache.h | 1 +
> include/linux/iommu-helper.h | 4 +-
> include/linux/kernel.h | 173 +--------------------------------
> include/linux/math.h | 177 ++++++++++++++++++++++++++++++++++
> include/linux/rcu_node_tree.h | 2 +
> include/linux/units.h | 2 +-
> lib/errname.c | 1 +
> lib/errseq.c | 1 +
> lib/find_bit.c | 3 +-
> lib/math/div64.c | 4 +-
> lib/math/int_pow.c | 2 +-
> lib/math/int_sqrt.c | 3 +-
> lib/math/reciprocal_div.c | 9 +-
> 15 files changed, 215 insertions(+), 183 deletions(-)
> create mode 100644 include/linux/math.h
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers
2022-07-16 9:08 ` Pavel Machek
@ 2022-07-16 14:16 ` Biju Das
0 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-16 14:16 UTC (permalink / raw)
To: Pavel Machek
Cc: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu, Chris Paterson,
Prabhakar Mahadev Lad
Hi Pavel,
Thanks for the feedback.
> Subject: Re: [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out
> mathematical helpers
>
> Hi!
>
> > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> >
> > commit aa6159ab99a9ab5df835b4750b66cf132a5aa292 upstream
> >
> > kernel.h is being used as a dump for all kinds of stuff for a long
> time.
> > Here is the attempt to start cleaning it up by splitting out
> > mathematical helpers.
> >
> > At the same time convert users in header and lib folder to use new
> > header. Though for time being include new header back to kernel.h to
> > avoid twisted indirected includes for existing users.
>
> This is rather intrusive for two lines which we really need, and may
> cause rejects in future.
>
> I'd suggest identifying the defines needed by the driver, and just adding
> those. kernel.h would be acceptable. Or you can add math.h with just
> defines needed, but please avoid code movement.
OK, will send v2. By adding needed defines in kernel.h and replacing driver include
math.h->kernel.h
Cheers,
Biju
>
> > ---
> > fs/nfs/callback_proc.c | 5 +
> > include/linux/bitops.h | 11 ++-
> > include/linux/dcache.h | 1 +
> > include/linux/iommu-helper.h | 4 +-
> > include/linux/kernel.h | 173 +--------------------------------
> > include/linux/math.h | 177 ++++++++++++++++++++++++++++++++++
> > include/linux/rcu_node_tree.h | 2 +
> > include/linux/units.h | 2 +-
> > lib/errname.c | 1 +
> > lib/errseq.c | 1 +
> > lib/find_bit.c | 3 +-
> > lib/math/div64.c | 4 +-
> > lib/math/int_pow.c | 2 +-
> > lib/math/int_sqrt.c | 3 +-
> > lib/math/reciprocal_div.c | 9 +-
> > 15 files changed, 215 insertions(+), 183 deletions(-) create mode
> > 100644 include/linux/math.h
>
>
>
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH RESEND 5.10.y-cip 02/13] units: Add SI metric prefix definitions
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L Biju Das
` (11 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
commit 26471d4a6cf8d5d0bd0fb55c7169de7d67cc703a upstream.
Sometimes it's useful to have well-defined SI metric prefix to be used
to self-describe the formulas or equations.
List most popular ones in the units.h.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
include/linux/units.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/include/linux/units.h b/include/linux/units.h
index 5c115c809507..4a25e0cc8fb3 100644
--- a/include/linux/units.h
+++ b/include/linux/units.h
@@ -4,6 +4,26 @@
#include <linux/math.h>
+/* Metric prefixes in accordance with Système international (d'unités) */
+#define PETA 1000000000000000ULL
+#define TERA 1000000000000ULL
+#define GIGA 1000000000UL
+#define MEGA 1000000UL
+#define KILO 1000UL
+#define HECTO 100UL
+#define DECA 10UL
+#define DECI 10UL
+#define CENTI 100UL
+#define MILLI 1000UL
+#define MICRO 1000000UL
+#define NANO 1000000000UL
+#define PICO 1000000000000ULL
+#define FEMTO 1000000000000000ULL
+
+#define MILLIWATT_PER_WATT 1000L
+#define MICROWATT_PER_MILLIWATT 1000L
+#define MICROWATT_PER_WATT 1000000L
+
#define ABSOLUTE_ZERO_MILLICELSIUS -273150
static inline long milli_kelvin_to_millicelsius(long t)
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 02/13] units: Add SI metric prefix definitions Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-16 10:53 ` [cip-dev] " Pavel Machek
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 04/13] thermal/drivers/rz2gl: Add error check for reset_control_deassert() Biju Das
` (10 subsequent siblings)
13 siblings, 1 reply; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit 673c68bd48390dad01f7d17670de3e33b60860ac upstream.
The RZ/G2L SoC incorporates a thermal sensor unit (TSU) that measures the
temperature inside the LSI.
The thermal sensor in this unit measures temperatures in the range from
−40 degree Celsius to 125 degree Celsius with an accuracy of ±3°C. The
TSU repeats measurement at 20 microseconds intervals and automatically
updates the results of measurement.
The TSU has no interrupts as well as no external pins.
This patch adds Thermal Sensor Unit(TSU) driver for RZ/G2L SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211130155757.17837-3-biju.das.jz@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/thermal/Kconfig | 9 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/rzg2l_thermal.c | 240 ++++++++++++++++++++++++++++++++
3 files changed, 250 insertions(+)
create mode 100644 drivers/thermal/rzg2l_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 7edc8dc6bbab..e51c8cc989d8 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -354,6 +354,15 @@ config RCAR_GEN3_THERMAL
Enable this to plug the R-Car Gen3 or RZ/G2 thermal sensor driver into
the Linux thermal framework.
+config RZG2L_THERMAL
+ tristate "Renesas RZ/G2L thermal driver"
+ depends on ARCH_RENESAS || COMPILE_TEST
+ depends on HAS_IOMEM
+ depends on OF
+ help
+ Enable this to plug the RZ/G2L thermal sensor driver into the Linux
+ thermal framework.
+
config KIRKWOOD_THERMAL
tristate "Temperature sensor on Marvell Kirkwood SoCs"
depends on MACH_KIRKWOOD || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index b64dd50a6629..b71f9b88b567 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o
obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
obj-$(CONFIG_RCAR_GEN3_THERMAL) += rcar_gen3_thermal.o
+obj-$(CONFIG_RZG2L_THERMAL) += rzg2l_thermal.o
obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
obj-y += samsung/
obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
diff --git a/drivers/thermal/rzg2l_thermal.c b/drivers/thermal/rzg2l_thermal.c
new file mode 100644
index 000000000000..d47d4a30cd6c
--- /dev/null
+++ b/drivers/thermal/rzg2l_thermal.c
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G2L TSU Thermal Sensor Driver
+ *
+ * Copyright (C) 2021 Renesas Electronics Corporation
+ */
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/math.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+#include <linux/thermal.h>
+#include <linux/units.h>
+
+#include "thermal_hwmon.h"
+
+#define CTEMP_MASK 0xFFF
+
+/* default calibration values, if FUSE values are missing */
+#define SW_CALIB0_VAL 3148
+#define SW_CALIB1_VAL 503
+
+/* Register offsets */
+#define TSU_SM 0x00
+#define TSU_ST 0x04
+#define TSU_SAD 0x0C
+#define TSU_SS 0x10
+
+#define OTPTSUTRIM_REG(n) (0x18 + ((n) * 0x4))
+
+/* Sensor Mode Register(TSU_SM) */
+#define TSU_SM_EN_TS BIT(0)
+#define TSU_SM_ADC_EN_TS BIT(1)
+#define TSU_SM_NORMAL_MODE (TSU_SM_EN_TS | TSU_SM_ADC_EN_TS)
+
+/* TSU_ST bits */
+#define TSU_ST_START BIT(0)
+
+#define TSU_SS_CONV_RUNNING BIT(0)
+
+#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
+#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
+#define TS_CODE_CAP_TIMES 8 /* Capture times */
+
+#define RZG2L_THERMAL_GRAN 500 /* milli Celsius */
+#define RZG2L_TSU_SS_TIMEOUT_US 1000
+
+#define CURVATURE_CORRECTION_CONST 13
+
+struct rzg2l_thermal_priv {
+ struct device *dev;
+ void __iomem *base;
+ struct thermal_zone_device *zone;
+ struct reset_control *rstc;
+ u32 calib0, calib1;
+};
+
+static inline u32 rzg2l_thermal_read(struct rzg2l_thermal_priv *priv, u32 reg)
+{
+ return ioread32(priv->base + reg);
+}
+
+static inline void rzg2l_thermal_write(struct rzg2l_thermal_priv *priv, u32 reg,
+ u32 data)
+{
+ iowrite32(data, priv->base + reg);
+}
+
+static int rzg2l_thermal_get_temp(void *devdata, int *temp)
+{
+ struct rzg2l_thermal_priv *priv = devdata;
+ u32 result = 0, dsensor, ts_code_ave;
+ int val, i;
+
+ for (i = 0; i < TS_CODE_CAP_TIMES ; i++) {
+ /* TSU repeats measurement at 20 microseconds intervals and
+ * automatically updates the results of measurement. As per
+ * the HW manual for measuring temperature we need to read 8
+ * values consecutively and then take the average.
+ * ts_code_ave = (ts_code[0] + ⋯ + ts_code[7]) / 8
+ */
+ result += rzg2l_thermal_read(priv, TSU_SAD) & CTEMP_MASK;
+ usleep_range(20, 30);
+ }
+
+ ts_code_ave = result / TS_CODE_CAP_TIMES;
+
+ /* Calculate actual sensor value by applying curvature correction formula
+ * dsensor = ts_code_ave / (1 + ts_code_ave * 0.000013). Here we are doing
+ * integer calculation by scaling all the values by 1000000.
+ */
+ dsensor = TS_CODE_AVE_SCALE(ts_code_ave) /
+ (TS_CODE_AVE_SCALE(1) + (ts_code_ave * CURVATURE_CORRECTION_CONST));
+
+ /* The temperature Tj is calculated by the formula
+ * Tj = (dsensor − calib1) * 165/ (calib0 − calib1) − 40
+ * where calib0 and calib1 are the caliberation values.
+ */
+ val = ((dsensor - priv->calib1) * (MCELSIUS(165) /
+ (priv->calib0 - priv->calib1))) - MCELSIUS(40);
+
+ *temp = roundup(val, RZG2L_THERMAL_GRAN);
+
+ return 0;
+}
+
+static const struct thermal_zone_of_device_ops rzg2l_tz_of_ops = {
+ .get_temp = rzg2l_thermal_get_temp,
+};
+
+static int rzg2l_thermal_init(struct rzg2l_thermal_priv *priv)
+{
+ u32 reg_val;
+
+ rzg2l_thermal_write(priv, TSU_SM, TSU_SM_NORMAL_MODE);
+ rzg2l_thermal_write(priv, TSU_ST, 0);
+
+ /* Before setting the START bit, TSU should be in normal operating
+ * mode. As per the HW manual, it will take 60 µs to place the TSU
+ * into normal operating mode.
+ */
+ usleep_range(60, 80);
+
+ reg_val = rzg2l_thermal_read(priv, TSU_ST);
+ reg_val |= TSU_ST_START;
+ rzg2l_thermal_write(priv, TSU_ST, reg_val);
+
+ return readl_poll_timeout(priv->base + TSU_SS, reg_val,
+ reg_val == TSU_SS_CONV_RUNNING, 50,
+ RZG2L_TSU_SS_TIMEOUT_US);
+}
+
+static void rzg2l_thermal_reset_assert_pm_disable_put(struct platform_device *pdev)
+{
+ struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
+
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+ reset_control_assert(priv->rstc);
+}
+
+static int rzg2l_thermal_remove(struct platform_device *pdev)
+{
+ struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
+
+ thermal_remove_hwmon_sysfs(priv->zone);
+ rzg2l_thermal_reset_assert_pm_disable_put(pdev);
+
+ return 0;
+}
+
+static int rzg2l_thermal_probe(struct platform_device *pdev)
+{
+ struct thermal_zone_device *zone;
+ struct rzg2l_thermal_priv *priv;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ priv->dev = dev;
+ priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(priv->rstc))
+ return dev_err_probe(dev, PTR_ERR(priv->rstc),
+ "failed to get cpg reset");
+
+ reset_control_deassert(priv->rstc);
+
+ pm_runtime_enable(dev);
+ pm_runtime_get_sync(dev);
+
+ priv->calib0 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0));
+ if (!priv->calib0)
+ priv->calib0 = SW_CALIB0_VAL;
+
+ priv->calib1 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(1));
+ if (!priv->calib1)
+ priv->calib1 = SW_CALIB1_VAL;
+
+ platform_set_drvdata(pdev, priv);
+ ret = rzg2l_thermal_init(priv);
+ if (ret) {
+ dev_err(dev, "Failed to start TSU");
+ goto err;
+ }
+
+ zone = devm_thermal_zone_of_sensor_register(dev, 0, priv,
+ &rzg2l_tz_of_ops);
+ if (IS_ERR(zone)) {
+ dev_err(dev, "Can't register thermal zone");
+ ret = PTR_ERR(zone);
+ goto err;
+ }
+
+ priv->zone = zone;
+ priv->zone->tzp->no_hwmon = false;
+ ret = thermal_add_hwmon_sysfs(priv->zone);
+ if (ret)
+ goto err;
+
+ dev_dbg(dev, "TSU probed with %s caliberation values",
+ rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0)) ? "hw" : "sw");
+
+ return 0;
+
+err:
+ rzg2l_thermal_reset_assert_pm_disable_put(pdev);
+ return ret;
+}
+
+static const struct of_device_id rzg2l_thermal_dt_ids[] = {
+ { .compatible = "renesas,rzg2l-tsu", },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, rzg2l_thermal_dt_ids);
+
+static struct platform_driver rzg2l_thermal_driver = {
+ .driver = {
+ .name = "rzg2l_thermal",
+ .of_match_table = rzg2l_thermal_dt_ids,
+ },
+ .probe = rzg2l_thermal_probe,
+ .remove = rzg2l_thermal_remove,
+};
+module_platform_driver(rzg2l_thermal_driver);
+
+MODULE_DESCRIPTION("Renesas RZ/G2L TSU Thermal Sensor Driver");
+MODULE_AUTHOR("Biju Das <biju.das.jz@bp.renesas.com>");
+MODULE_LICENSE("GPL v2");
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L Biju Das
@ 2022-07-16 10:53 ` Pavel Machek
2022-07-16 14:36 ` Biju Das
0 siblings, 1 reply; 25+ messages in thread
From: Pavel Machek @ 2022-07-16 10:53 UTC (permalink / raw)
To: cip-dev
Cc: Nobuhiro Iwamatsu, Pavel Machek, Chris Paterson, Biju Das,
Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1614 bytes --]
Hi!
> commit 673c68bd48390dad01f7d17670de3e33b60860ac upstream.
>
> The RZ/G2L SoC incorporates a thermal sensor unit (TSU) that measures the
> temperature inside the LSI.
>
> The thermal sensor in this unit measures temperatures in the range from
> −40 degree Celsius to 125 degree Celsius with an accuracy of ±3°C. The
> TSU repeats measurement at 20 microseconds intervals and automatically
> updates the results of measurement.
>
> The TSU has no interrupts as well as no external pins.
>
> This patch adds Thermal Sensor Unit(TSU) driver for RZ/G2L SoC.
> +#define TSU_SS_CONV_RUNNING BIT(0)
> +
> +#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
> +#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
> +#define TS_CODE_CAP_TIMES 8 /* Capture times */
Two spaces, plus "capture times" does not really explain much.
> +static int rzg2l_thermal_get_temp(void *devdata, int *temp)
> +{
> + struct rzg2l_thermal_priv *priv = devdata;
> + u32 result = 0, dsensor, ts_code_ave;
> + int val, i;
> +
> + for (i = 0; i < TS_CODE_CAP_TIMES ; i++) {
> + /* TSU repeats measurement at 20 microseconds intervals and
> + * automatically updates the results of
According to CodingStyle, /* should be on separate line.
> + dev_dbg(dev, "TSU probed with %s caliberation values",
> + rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0)) ? "hw" : "sw");
Typo, should be "calibration" I guess.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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^ permalink raw reply [flat|nested] 25+ messages in thread* RE: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L
2022-07-16 10:53 ` [cip-dev] " Pavel Machek
@ 2022-07-16 14:36 ` Biju Das
2022-07-18 5:44 ` Biju Das
0 siblings, 1 reply; 25+ messages in thread
From: Biju Das @ 2022-07-16 14:36 UTC (permalink / raw)
To: Pavel Machek, cip-dev@lists.cip-project.org
Cc: Nobuhiro Iwamatsu, Chris Paterson, Prabhakar Mahadev Lad
Hi Pavel,
Thanks for the feedback.
> Subject: Re: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers:
> Add TSU driver for RZ/G2L
>
> Hi!
>
> > commit 673c68bd48390dad01f7d17670de3e33b60860ac upstream.
> >
> > The RZ/G2L SoC incorporates a thermal sensor unit (TSU) that measures
> > the temperature inside the LSI.
> >
> > The thermal sensor in this unit measures temperatures in the range
> > from
> > −40 degree Celsius to 125 degree Celsius with an accuracy of ±3°C. The
> > TSU repeats measurement at 20 microseconds intervals and automatically
> > updates the results of measurement.
> >
> > The TSU has no interrupts as well as no external pins.
> >
> > This patch adds Thermal Sensor Unit(TSU) driver for RZ/G2L SoC.
>
> > +#define TSU_SS_CONV_RUNNING BIT(0)
> > +
> > +#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
> > +#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
> > +#define TS_CODE_CAP_TIMES 8 /* Capture times */
>
> Two spaces, plus "capture times" does not really explain much.
OK, will fix the 2 spaces. For " capture times" Basically we need to read
TSU_SAD register eight times consecutively at 20 microseconds interval.
I will try to drop the comment /* Capture times */ from mainline, if it does
not really explain the intention.
>
> > +static int rzg2l_thermal_get_temp(void *devdata, int *temp) {
> > + struct rzg2l_thermal_priv *priv = devdata;
> > + u32 result = 0, dsensor, ts_code_ave;
> > + int val, i;
> > +
> > + for (i = 0; i < TS_CODE_CAP_TIMES ; i++) {
> > + /* TSU repeats measurement at 20 microseconds intervals and
> > + * automatically updates the results of
>
> According to CodingStyle, /* should be on separate line.
My bad, will fix this.
>
> > + dev_dbg(dev, "TSU probed with %s caliberation values",
> > + rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0)) ? "hw" : "sw");
>
> Typo, should be "calibration" I guess.
OK, will fix this.
Cheers,
Biju
^ permalink raw reply [flat|nested] 25+ messages in thread* RE: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L
2022-07-16 14:36 ` Biju Das
@ 2022-07-18 5:44 ` Biju Das
2022-07-18 8:55 ` Pavel Machek
0 siblings, 1 reply; 25+ messages in thread
From: Biju Das @ 2022-07-18 5:44 UTC (permalink / raw)
To: Pavel Machek, cip-dev@lists.cip-project.org
Cc: Nobuhiro Iwamatsu, Chris Paterson, Prabhakar Mahadev Lad
Hi Pavel,
> Subject: RE: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers:
> Add TSU driver for RZ/G2L
>
> Hi Pavel,
>
> Thanks for the feedback.
>
> > Subject: Re: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers:
> > Add TSU driver for RZ/G2L
> >
> > Hi!
> >
> > > commit 673c68bd48390dad01f7d17670de3e33b60860ac upstream.
> > >
> > > The RZ/G2L SoC incorporates a thermal sensor unit (TSU) that
> > > measures the temperature inside the LSI.
> > >
> > > The thermal sensor in this unit measures temperatures in the range
> > > from
> > > −40 degree Celsius to 125 degree Celsius with an accuracy of ±3°C.
> > > The TSU repeats measurement at 20 microseconds intervals and
> > > automatically updates the results of measurement.
> > >
> > > The TSU has no interrupts as well as no external pins.
> > >
> > > This patch adds Thermal Sensor Unit(TSU) driver for RZ/G2L SoC.
> >
> > > +#define TSU_SS_CONV_RUNNING BIT(0)
> > > +
> > > +#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
> > > +#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
> > > +#define TS_CODE_CAP_TIMES 8 /* Capture times */
> >
> > Two spaces, plus "capture times" does not really explain much.
>
> OK, will fix the 2 spaces. For " capture times" Basically we need to read
> TSU_SAD register eight times consecutively at 20 microseconds interval.
>
> I will try to drop the comment /* Capture times */ from mainline, if it
> does not really explain the intention.
Or
What about "Total number of ADC data samples"? Does it better?
Please let me know.
Cheers,
Biju
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L
2022-07-18 5:44 ` Biju Das
@ 2022-07-18 8:55 ` Pavel Machek
2022-07-18 9:01 ` Biju Das
0 siblings, 1 reply; 25+ messages in thread
From: Pavel Machek @ 2022-07-18 8:55 UTC (permalink / raw)
To: Biju Das
Cc: Pavel Machek, cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu,
Chris Paterson, Prabhakar Mahadev Lad
Hi!
> > > > commit 673c68bd48390dad01f7d17670de3e33b60860ac upstream.
> > > >
> > > > The RZ/G2L SoC incorporates a thermal sensor unit (TSU) that
> > > > measures the temperature inside the LSI.
> > > >
> > > > The thermal sensor in this unit measures temperatures in the range
> > > > from
> > > > ???40 degree Celsius to 125 degree Celsius with an accuracy of ??3°C.
> > > > The TSU repeats measurement at 20 microseconds intervals and
> > > > automatically updates the results of measurement.
> > > >
> > > > The TSU has no interrupts as well as no external pins.
> > > >
> > > > This patch adds Thermal Sensor Unit(TSU) driver for RZ/G2L SoC.
> > >
> > > > +#define TSU_SS_CONV_RUNNING BIT(0)
> > > > +
> > > > +#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
> > > > +#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
> > > > +#define TS_CODE_CAP_TIMES 8 /* Capture times */
> > >
> > > Two spaces, plus "capture times" does not really explain much.
> >
> > OK, will fix the 2 spaces. For " capture times" Basically we need to read
> > TSU_SAD register eight times consecutively at 20 microseconds interval.
> >
> > I will try to drop the comment /* Capture times */ from mainline, if it
> > does not really explain the intention.
>
> Or
>
> What about "Total number of ADC data samples"? Does it better?
> Please let me know.
Yes, that sounds better.
Thanks,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L
2022-07-18 8:55 ` Pavel Machek
@ 2022-07-18 9:01 ` Biju Das
0 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-18 9:01 UTC (permalink / raw)
To: Pavel Machek
Cc: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu, Chris Paterson,
Prabhakar Mahadev Lad
> Subject: Re: [cip-dev] [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers:
> Add TSU driver for RZ/G2L
>
> Hi!
>
> > > > > commit 673c68bd48390dad01f7d17670de3e33b60860ac upstream.
> > > > >
> > > > > The RZ/G2L SoC incorporates a thermal sensor unit (TSU) that
> > > > > measures the temperature inside the LSI.
> > > > >
> > > > > The thermal sensor in this unit measures temperatures in the
> > > > > range from
> > > > > ???40 degree Celsius to 125 degree Celsius with an accuracy of
> ??3°C.
> > > > > The TSU repeats measurement at 20 microseconds intervals and
> > > > > automatically updates the results of measurement.
> > > > >
> > > > > The TSU has no interrupts as well as no external pins.
> > > > >
> > > > > This patch adds Thermal Sensor Unit(TSU) driver for RZ/G2L SoC.
> > > >
> > > > > +#define TSU_SS_CONV_RUNNING BIT(0)
> > > > > +
> > > > > +#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
> > > > > +#define MCELSIUS(temp) ((temp) *
> MILLIDEGREE_PER_DEGREE)
> > > > > +#define TS_CODE_CAP_TIMES 8 /* Capture times */
> > > >
> > > > Two spaces, plus "capture times" does not really explain much.
> > >
> > > OK, will fix the 2 spaces. For " capture times" Basically we need to
> > > read TSU_SAD register eight times consecutively at 20 microseconds
> interval.
> > >
> > > I will try to drop the comment /* Capture times */ from mainline,
> > > if it does not really explain the intention.
> >
> > Or
> >
> > What about "Total number of ADC data samples"? Does it better?
> > Please let me know.
>
> Yes, that sounds better.
OK, will upstream these changes.
Thanks and regards,
Biju
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH RESEND 5.10.y-cip 04/13] thermal/drivers/rz2gl: Add error check for reset_control_deassert()
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (2 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 05/13] thermal/drivers/rz2gl: Fix OTP Calibration Register values Biju Das
` (9 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit 8ee1c0f6526ce942b7595951c7bb0165010051c2 upstream.
If reset_control_deassert() fails, then we won't be able to access
the device registers. Therefore check the return code of
reset_control_deassert() and bail out in case of error.
While at it replace the parameter "&pdev->dev" -> "dev" in
devm_reset_control_get_exclusive().
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20211208164010.4130-1-biju.das.jz@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/thermal/rzg2l_thermal.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/rzg2l_thermal.c b/drivers/thermal/rzg2l_thermal.c
index d47d4a30cd6c..7a9cdc1f37ca 100644
--- a/drivers/thermal/rzg2l_thermal.c
+++ b/drivers/thermal/rzg2l_thermal.c
@@ -170,12 +170,14 @@ static int rzg2l_thermal_probe(struct platform_device *pdev)
return PTR_ERR(priv->base);
priv->dev = dev;
- priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ priv->rstc = devm_reset_control_get_exclusive(dev, NULL);
if (IS_ERR(priv->rstc))
return dev_err_probe(dev, PTR_ERR(priv->rstc),
"failed to get cpg reset");
- reset_control_deassert(priv->rstc);
+ ret = reset_control_deassert(priv->rstc);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to deassert");
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 05/13] thermal/drivers/rz2gl: Fix OTP Calibration Register values
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (3 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 04/13] thermal/drivers/rz2gl: Add error check for reset_control_deassert() Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 06/13] arm64: defconfig: Enable additional support for Renesas platforms Biju Das
` (8 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit 2d37f5c90bdc659b329dac7cf6d165a4bbf34cb6 upstream.
As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the bit 31 of TSU OTP Calibration Register(OTPTSUTRIM) indicates
whether bit [11:0] of OTPTSUTRIM is valid or invalid.
This patch updates the code to reflect this change.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220428093346.7552-1-biju.das.jz@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/thermal/rzg2l_thermal.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/rzg2l_thermal.c b/drivers/thermal/rzg2l_thermal.c
index 7a9cdc1f37ca..be07e04c6926 100644
--- a/drivers/thermal/rzg2l_thermal.c
+++ b/drivers/thermal/rzg2l_thermal.c
@@ -32,6 +32,8 @@
#define TSU_SS 0x10
#define OTPTSUTRIM_REG(n) (0x18 + ((n) * 0x4))
+#define OTPTSUTRIM_EN_MASK BIT(31)
+#define OTPTSUTRIM_MASK GENMASK(11, 0)
/* Sensor Mode Register(TSU_SM) */
#define TSU_SM_EN_TS BIT(0)
@@ -183,11 +185,15 @@ static int rzg2l_thermal_probe(struct platform_device *pdev)
pm_runtime_get_sync(dev);
priv->calib0 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0));
- if (!priv->calib0)
+ if (priv->calib0 & OTPTSUTRIM_EN_MASK)
+ priv->calib0 &= OTPTSUTRIM_MASK;
+ else
priv->calib0 = SW_CALIB0_VAL;
priv->calib1 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(1));
- if (!priv->calib1)
+ if (priv->calib1 & OTPTSUTRIM_EN_MASK)
+ priv->calib1 &= OTPTSUTRIM_MASK;
+ else
priv->calib1 = SW_CALIB1_VAL;
platform_set_drvdata(pdev, priv);
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 06/13] arm64: defconfig: Enable additional support for Renesas platforms
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (4 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 05/13] thermal/drivers/rz2gl: Fix OTP Calibration Register values Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 07/13] watchdog: rzg2l_wdt: Fix 32bit overflow issue Biju Das
` (7 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
From: Geert Uytterhoeven <geert+renesas@glider.be>
commit 2e8a3335472461927e57d1741ccf1791ff416075 upstream.
Increase build and test coverage by enabling support for more hardware
present on Renesas SoCs and boards:
- Renesas RSPI, RZ/G2L thermal, RZ/G2L WDT watchdog, and OSTM timer,
as used on the RZ/G2L SMARC EVK board,
- R-Car Image Signal Processor (ISP) and Display Unit embedded MIPI
DSI encoder on R-Car V3U, as used on the Falcon board.
All of the above are modular, except for thermal, watchdog, and timer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c9800d67f91a90d418a3ce44c59109ae0a87b2d8.1643373223.git.geert+renesas@glider.be
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
[biju: Removed R-Car V3U configs]
---
arch/arm64/configs/defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 7575dbd6f57c..58a79a3e1cd0 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -465,6 +465,7 @@ CONFIG_SPI_ORION=y
CONFIG_SPI_PL022=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_RPCIF=m
+CONFIG_SPI_RSPI=m
CONFIG_SPI_QCOM_QSPI=m
CONFIG_SPI_QUP=y
CONFIG_SPI_QCOM_GENI=m
@@ -540,6 +541,7 @@ CONFIG_IMX8MM_THERMAL=m
CONFIG_ROCKCHIP_THERMAL=m
CONFIG_RCAR_THERMAL=y
CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_RZG2L_THERMAL=y
CONFIG_ARMADA_THERMAL=y
CONFIG_BCM2711_THERMAL=m
CONFIG_BCM2835_THERMAL=m
@@ -563,6 +565,7 @@ CONFIG_QCOM_WDT=m
CONFIG_MESON_GXBB_WATCHDOG=m
CONFIG_MESON_WATCHDOG=m
CONFIG_RENESAS_WDT=y
+CONFIG_RENESAS_RZG2LWDT=y
CONFIG_UNIPHIER_WATCHDOG=y
CONFIG_BCM2835_WDT=y
CONFIG_MFD_ALTERA_SYSMGR=y
@@ -909,6 +912,7 @@ CONFIG_SM_GPUCC_8250=y
CONFIG_QCOM_HFPLL=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
+CONFIG_RENESAS_OSTM=y
CONFIG_ARM_MHU=y
CONFIG_IMX_MBOX=y
CONFIG_PLATFORM_MHU=y
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 07/13] watchdog: rzg2l_wdt: Fix 32bit overflow issue
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (5 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 06/13] arm64: defconfig: Enable additional support for Renesas platforms Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 08/13] watchdog: rzg2l_wdt: Fix Runtime PM usage Biju Das
` (6 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit ea2949df22a533cdf75e4583c00b1ce94cd5a83b upstream.
The value of timer_cycle_us can be 0 due to 32bit overflow.
For eg:- If we assign the counter value "0xfff" for computing
maxval.
This patch fixes this issue by appending ULL to 1024, so that
it is promoted to 64bit.
This patch also fixes the warning message, 'watchdog: Invalid min and
max timeout values, resetting to 0!'.
Fixes: 2cbc5cd0b55fa2 ("watchdog: Add Watchdog Timer driver for RZ/G2L")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220225175320.11041-2-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 6b426df34fd6..96f2a018ab62 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -53,7 +53,7 @@ static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv)
static u32 rzg2l_wdt_get_cycle_usec(unsigned long cycle, u32 wdttime)
{
- u64 timer_cycle_us = 1024 * 1024 * (wdttime + 1) * MICRO;
+ u64 timer_cycle_us = 1024 * 1024ULL * (wdttime + 1) * MICRO;
return div64_ul(timer_cycle_us, cycle);
}
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 08/13] watchdog: rzg2l_wdt: Fix Runtime PM usage
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (6 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 07/13] watchdog: rzg2l_wdt: Fix 32bit overflow issue Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 09/13] watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context' Biju Das
` (5 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit 95abafe76297fa057de6c3486ef844bd446bdf18 upstream.
Both rzg2l_wdt_probe() and rzg2l_wdt_start() calls pm_runtime_get() which
results in a usage counter imbalance. This patch fixes this issue by
removing pm_runtime_get() call from probe.
Fixes: 2cbc5cd0b55fa2 ("watchdog: Add Watchdog Timer driver for RZ/G2L")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-3-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 96f2a018ab62..0fc73b8a9567 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -151,12 +151,11 @@ static const struct watchdog_ops rzg2l_wdt_ops = {
.restart = rzg2l_wdt_restart,
};
-static void rzg2l_wdt_reset_assert_pm_disable_put(void *data)
+static void rzg2l_wdt_reset_assert_pm_disable(void *data)
{
struct watchdog_device *wdev = data;
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
- pm_runtime_put(wdev->parent);
pm_runtime_disable(wdev->parent);
reset_control_assert(priv->rstc);
}
@@ -206,11 +205,6 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
reset_control_deassert(priv->rstc);
pm_runtime_enable(&pdev->dev);
- ret = pm_runtime_resume_and_get(&pdev->dev);
- if (ret < 0) {
- dev_err(dev, "pm_runtime_resume_and_get failed ret=%pe", ERR_PTR(ret));
- goto out_pm_get;
- }
priv->wdev.info = &rzg2l_wdt_ident;
priv->wdev.ops = &rzg2l_wdt_ops;
@@ -222,7 +216,7 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
watchdog_set_drvdata(&priv->wdev, priv);
ret = devm_add_action_or_reset(&pdev->dev,
- rzg2l_wdt_reset_assert_pm_disable_put,
+ rzg2l_wdt_reset_assert_pm_disable,
&priv->wdev);
if (ret < 0)
return ret;
@@ -235,12 +229,6 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
dev_warn(dev, "Specified timeout invalid, using default");
return devm_watchdog_register_device(&pdev->dev, &priv->wdev);
-
-out_pm_get:
- pm_runtime_disable(dev);
- reset_control_assert(priv->rstc);
-
- return ret;
}
static const struct of_device_id rzg2l_wdt_ids[] = {
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 09/13] watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context'
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (7 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 08/13] watchdog: rzg2l_wdt: Fix Runtime PM usage Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 10/13] watchdog: rzg2l_wdt: Fix reset control imbalance Biju Das
` (4 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit e4cf89596c1f1e33309556699f910ced4abbaf44 upstream.
This patch fixes the issue 'BUG: Invalid wait context' during restart()
callback by using clk_prepare_enable() instead of pm_runtime_get_sync()
for turning on the clocks during restart.
This issue is noticed when testing with renesas_defconfig.
[ 42.213802] reboot: Restarting system
[ 42.217860]
[ 42.219364] =============================
[ 42.223368] [ BUG: Invalid wait context ]
[ 42.227372] 5.17.0-rc5-arm64-renesas-00002-g10393723e35e #522 Not tainted
[ 42.234153] -----------------------------
[ 42.238155] systemd-shutdow/1 is trying to lock:
[ 42.242766] ffff00000a650828 (&genpd->mlock){+.+.}-{3:3}, at: genpd_lock_mtx+0x14/0x20
[ 42.250709] other info that might help us debug this:
[ 42.255753] context-{4:4}
[ 42.258368] 2 locks held by systemd-shutdow/1:
[ 42.262806] #0: ffff80000944e1c8 (system_transition_mutex#2){+.+.}-{3:3}, at: __do_sys_reboot+0xd0/0x250
[ 42.272388] #1: ffff8000094c4e40 (rcu_read_lock){....}-{1:2}, at: atomic_notifier_call_chain+0x0/0x150
[ 42.281795] stack backtrace:
[ 42.284672] CPU: 0 PID: 1 Comm: systemd-shutdow Not tainted 5.17.0-rc5-arm64-renesas-00002-g10393723e35e #522
[ 42.294577] Hardware name: Renesas SMARC EVK based on r9a07g044c2 (DT)
[ 42.301096] Call trace:
[ 42.303538] dump_backtrace+0xcc/0xd8
[ 42.307203] show_stack+0x14/0x30
[ 42.310517] dump_stack_lvl+0x88/0xb0
[ 42.314180] dump_stack+0x14/0x2c
[ 42.317492] __lock_acquire+0x1b24/0x1b50
[ 42.321502] lock_acquire+0x120/0x3a8
[ 42.325162] __mutex_lock+0x84/0x8f8
[ 42.328737] mutex_lock_nested+0x30/0x58
[ 42.332658] genpd_lock_mtx+0x14/0x20
[ 42.336319] genpd_runtime_resume+0xc4/0x228
[ 42.340587] __rpm_callback+0x44/0x170
[ 42.344337] rpm_callback+0x64/0x70
[ 42.347824] rpm_resume+0x4e0/0x6b8
[ 42.351310] __pm_runtime_resume+0x50/0x78
[ 42.355404] rzg2l_wdt_restart+0x28/0x68
[ 42.359329] watchdog_restart_notifier+0x1c/0x30
[ 42.363943] atomic_notifier_call_chain+0x94/0x150
[ 42.368732] do_kernel_restart+0x24/0x30
[ 42.372652] machine_restart+0x44/0x70
[ 42.376399] kernel_restart+0x3c/0x60
[ 42.380058] __do_sys_reboot+0x228/0x250
[ 42.383977] __arm64_sys_reboot+0x20/0x28
[ 42.387983] invoke_syscall+0x40/0xf8
Fixes: 2cbc5cd0b55fa2 ("watchdog: Add Watchdog Timer driver for RZ/G2L")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-4-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 25 +++++++++++++------------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 0fc73b8a9567..48dfe6e5e64f 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -43,6 +43,8 @@ struct rzg2l_wdt_priv {
struct reset_control *rstc;
unsigned long osc_clk_rate;
unsigned long delay;
+ struct clk *pclk;
+ struct clk *osc_clk;
};
static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv)
@@ -118,7 +120,9 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev,
/* Reset the module before we modify any register */
reset_control_reset(priv->rstc);
- pm_runtime_get_sync(wdev->parent);
+
+ clk_prepare_enable(priv->pclk);
+ clk_prepare_enable(priv->osc_clk);
/* smallest counter value to reboot soon */
rzg2l_wdt_write(priv, WDTSET_COUNTER_VAL(1), WDTSET);
@@ -165,7 +169,6 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct rzg2l_wdt_priv *priv;
unsigned long pclk_rate;
- struct clk *wdt_clk;
int ret;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -177,22 +180,20 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
return PTR_ERR(priv->base);
/* Get watchdog main clock */
- wdt_clk = clk_get(&pdev->dev, "oscclk");
- if (IS_ERR(wdt_clk))
- return dev_err_probe(&pdev->dev, PTR_ERR(wdt_clk), "no oscclk");
+ priv->osc_clk = devm_clk_get(&pdev->dev, "oscclk");
+ if (IS_ERR(priv->osc_clk))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->osc_clk), "no oscclk");
- priv->osc_clk_rate = clk_get_rate(wdt_clk);
- clk_put(wdt_clk);
+ priv->osc_clk_rate = clk_get_rate(priv->osc_clk);
if (!priv->osc_clk_rate)
return dev_err_probe(&pdev->dev, -EINVAL, "oscclk rate is 0");
/* Get Peripheral clock */
- wdt_clk = clk_get(&pdev->dev, "pclk");
- if (IS_ERR(wdt_clk))
- return dev_err_probe(&pdev->dev, PTR_ERR(wdt_clk), "no pclk");
+ priv->pclk = devm_clk_get(&pdev->dev, "pclk");
+ if (IS_ERR(priv->pclk))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->pclk), "no pclk");
- pclk_rate = clk_get_rate(wdt_clk);
- clk_put(wdt_clk);
+ pclk_rate = clk_get_rate(priv->pclk);
if (!pclk_rate)
return dev_err_probe(&pdev->dev, -EINVAL, "pclk rate is 0");
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 10/13] watchdog: rzg2l_wdt: Fix reset control imbalance
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (8 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 09/13] watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context' Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 11/13] watchdog: rzg2l_wdt: Add error check for reset_control_deassert Biju Das
` (3 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit 33d04d0fdba9fae18c7d58364643d2c606a43dba upstream.
Both rzg2l_wdt_probe() and rzg2l_wdt_start() calls reset_control_
deassert() which results in a reset control imbalance.
This patch fixes reset control imbalance by removing reset_control_
deassert() from rzg2l_wdt_start() and replaces reset_control_assert with
reset_control_reset in rzg2l_wdt_stop() as watchdog module can be stopped
only by a module reset. This change will allow us to restart WDT after
stop() by configuring WDT timeout and enable registers.
Fixes: 2cbc5cd0b55fa2 ("watchdog: Add Watchdog Timer driver for RZ/G2L")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-5-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 48dfe6e5e64f..88274704b260 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -88,7 +88,6 @@ static int rzg2l_wdt_start(struct watchdog_device *wdev)
{
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
- reset_control_deassert(priv->rstc);
pm_runtime_get_sync(wdev->parent);
/* Initialize time out */
@@ -108,7 +107,7 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev)
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
pm_runtime_put(wdev->parent);
- reset_control_assert(priv->rstc);
+ reset_control_reset(priv->rstc);
return 0;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 11/13] watchdog: rzg2l_wdt: Add error check for reset_control_deassert
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (9 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 10/13] watchdog: rzg2l_wdt: Fix reset control imbalance Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 12/13] watchdog: rzg2l_wdt: Use force reset for WDT reset Biju Das
` (2 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit baf1aace9ad15401f08e048a7f1fdec79821bc61 upstream.
If reset_control_deassert() fails, then we won't be able to
access the device registers. Therefore check the return code of
reset_control_deassert() and bailout in case of error.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-6-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 88274704b260..73b667ed3e99 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -203,7 +203,10 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, PTR_ERR(priv->rstc),
"failed to get cpg reset");
- reset_control_deassert(priv->rstc);
+ ret = reset_control_deassert(priv->rstc);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to deassert");
+
pm_runtime_enable(&pdev->dev);
priv->wdev.info = &rzg2l_wdt_ident;
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 12/13] watchdog: rzg2l_wdt: Use force reset for WDT reset
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (10 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 11/13] watchdog: rzg2l_wdt: Add error check for reset_control_deassert Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback Biju Das
2022-07-15 7:46 ` [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
13 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit f43e6ddbd7d7b63b9e71927a1f50860f8d55f9cc upstream.
This patch uses the force reset(WDTRSTB) for triggering WDT reset for
restart callback. This method(ie, Generate Reset (WDTRSTB) Signal on
parity error)is faster compared to the overflow method for triggering
watchdog reset.
Overflow method:
reboot: Restarting system
Reboot failed -- System halted
NOTICE: BL2: v2.5(release):v2.5/rzg2l-1.00-27-gf48f1440c
Parity error method:
reboot: Restarting system
NOTICE: BL2: v2.5(release):v2.5/rzg2l-1.00-27-gf48f1440c
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-7-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 73b667ed3e99..4e7107655cc2 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -21,8 +21,11 @@
#define WDTSET 0x04
#define WDTTIM 0x08
#define WDTINT 0x0C
+#define PECR 0x10
+#define PEEN 0x14
#define WDTCNT_WDTEN BIT(0)
#define WDTINT_INTDISP BIT(0)
+#define PEEN_FORCE BIT(0)
#define WDT_DEFAULT_TIMEOUT 60U
@@ -117,17 +120,14 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev,
{
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
- /* Reset the module before we modify any register */
- reset_control_reset(priv->rstc);
-
clk_prepare_enable(priv->pclk);
clk_prepare_enable(priv->osc_clk);
- /* smallest counter value to reboot soon */
- rzg2l_wdt_write(priv, WDTSET_COUNTER_VAL(1), WDTSET);
+ /* Generate Reset (WDTRSTB) Signal on parity error */
+ rzg2l_wdt_write(priv, 0, PECR);
- /* Enable watchdog timer*/
- rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT);
+ /* Force parity error */
+ rzg2l_wdt_write(priv, PEEN_FORCE, PEEN);
return 0;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (11 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 12/13] watchdog: rzg2l_wdt: Use force reset for WDT reset Biju Das
@ 2022-07-15 7:39 ` Biju Das
2022-07-16 11:13 ` Pavel Machek
2022-07-15 7:46 ` [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
13 siblings, 1 reply; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:39 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
commit 4055ee81009e606e830af1acd9e2e35a36249713 upstream.
This patch adds support for set_timeout callback.
Once WDT is started, the WDT cycle setting register(WDTSET) can be updated
only after issuing a module reset. Otherwise, it will ignore the writes
and will hold the previous value. This patch updates the WDTSET register
if it is active.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-8-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/watchdog/rzg2l_wdt.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 4e7107655cc2..6eea0ee4af49 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -115,6 +115,25 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev)
return 0;
}
+static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
+{
+ struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
+
+ wdev->timeout = timeout;
+
+ /*
+ * If the watchdog is active, reset the module for updating the WDTSET
+ * register so that it is updated with new timeout values.
+ */
+ if (watchdog_active(wdev)) {
+ pm_runtime_put(wdev->parent);
+ reset_control_reset(priv->rstc);
+ rzg2l_wdt_start(wdev);
+ }
+
+ return 0;
+}
+
static int rzg2l_wdt_restart(struct watchdog_device *wdev,
unsigned long action, void *data)
{
@@ -151,6 +170,7 @@ static const struct watchdog_ops rzg2l_wdt_ops = {
.start = rzg2l_wdt_start,
.stop = rzg2l_wdt_stop,
.ping = rzg2l_wdt_ping,
+ .set_timeout = rzg2l_wdt_set_timeout,
.restart = rzg2l_wdt_restart,
};
--
2.25.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback Biju Das
@ 2022-07-16 11:13 ` Pavel Machek
2022-07-16 14:24 ` Biju Das
0 siblings, 1 reply; 25+ messages in thread
From: Pavel Machek @ 2022-07-16 11:13 UTC (permalink / raw)
To: Biju Das
Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Chris Paterson,
Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1344 bytes --]
Hi!
> commit 4055ee81009e606e830af1acd9e2e35a36249713 upstream.
>
> This patch adds support for set_timeout callback.
>
> Once WDT is started, the WDT cycle setting register(WDTSET) can be updated
> only after issuing a module reset. Otherwise, it will ignore the writes
> and will hold the previous value. This patch updates the WDTSET register
> if it is active.
> +++ b/drivers/watchdog/rzg2l_wdt.c
> @@ -115,6 +115,25 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev)
> return 0;
> }
>
> +static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
> +{
> + struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
> +
> + wdev->timeout = timeout;
> +
> + /*
> + * If the watchdog is active, reset the module for updating the WDTSET
> + * register so that it is updated with new timeout values.
> + */
values->value?
> + if (watchdog_active(wdev)) {
> + pm_runtime_put(wdev->parent);
> + reset_control_reset(priv->rstc);
> + rzg2l_wdt_start(wdev);
> + }
This code is quite tricky. AFAICT it is correct, but calling
rzg2l_wdt_stop() instead would make it more readable.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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^ permalink raw reply [flat|nested] 25+ messages in thread* RE: [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback
2022-07-16 11:13 ` Pavel Machek
@ 2022-07-16 14:24 ` Biju Das
0 siblings, 0 replies; 25+ messages in thread
From: Biju Das @ 2022-07-16 14:24 UTC (permalink / raw)
To: Pavel Machek
Cc: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu, Chris Paterson,
Prabhakar Mahadev Lad
Hi Pavel,
Thanks for the feedback.
> Subject: Re: [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add
> set_timeout callback
>
> Hi!
>
> > commit 4055ee81009e606e830af1acd9e2e35a36249713 upstream.
> >
> > This patch adds support for set_timeout callback.
> >
> > Once WDT is started, the WDT cycle setting register(WDTSET) can be
> > updated only after issuing a module reset. Otherwise, it will ignore
> > the writes and will hold the previous value. This patch updates the
> > WDTSET register if it is active.
>
>
> > +++ b/drivers/watchdog/rzg2l_wdt.c
> > @@ -115,6 +115,25 @@ static int rzg2l_wdt_stop(struct watchdog_device
> *wdev)
> > return 0;
> > }
> >
> > +static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev,
> > +unsigned int timeout) {
> > + struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
> > +
> > + wdev->timeout = timeout;
> > +
> > + /*
> > + * If the watchdog is active, reset the module for updating the
> WDTSET
> > + * register so that it is updated with new timeout values.
> > + */
>
> values->value?
Ok, Will fix this in mainline.
>
> > + if (watchdog_active(wdev)) {
> > + pm_runtime_put(wdev->parent);
> > + reset_control_reset(priv->rstc);
> > + rzg2l_wdt_start(wdev);
> > + }
>
> This code is quite tricky. AFAICT it is correct, but calling
> rzg2l_wdt_stop() instead would make it more readable.
From readability point, this code holds good as we need to do
Module reset for changing time out values for WDT.
But from code optimization point, whatever you suggested is ok.
What do we do here, readability or optimization? Please suggest.
Cheers,
Biju
^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements
2022-07-15 7:39 [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
` (12 preceding siblings ...)
2022-07-15 7:39 ` [PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback Biju Das
@ 2022-07-15 7:46 ` Biju Das
2022-07-15 9:28 ` nobuhiro1.iwamatsu
13 siblings, 1 reply; 25+ messages in thread
From: Biju Das @ 2022-07-15 7:46 UTC (permalink / raw)
To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Prabhakar Mahadev Lad
Hi All,
I can see patch#2 and #3 of the series landed in [1], but it is not showing up in [2] and [3]. Any thoughts on this issue?
[1] https://lists.cip-project.org/g/cip-dev/topics
[2] https://patchwork.kernel.org/project/cip-dev/list/?series=659971
[3] https://lore.kernel.org/cip-dev/20220715073916.2321319-1-biju.das.jz@bp.renesas.com/T/#t
Cheers,
Biju
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: 15 July 2022 08:39
> To: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
> Cc: Chris Paterson <Chris.Paterson2@renesas.com>; Biju Das
> <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad <prabhakar.mahadev-
> lad.rj@bp.renesas.com>
> Subject: [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog
> driver enhancements
>
> This patch series aims to add thermal driver support and watchdog driver
> enhancments for RZ/G2L platform.
>
> Resending this patch series as patchwork is not showing
> patch#2 and #3 of the earlier series.
>
> Andy Shevchenko (2):
> kernel.h: split out mathematical helpers
> units: Add SI metric prefix definitions
>
> Biju Das (10):
> thermal/drivers: Add TSU driver for RZ/G2L
> thermal/drivers/rz2gl: Add error check for reset_control_deassert()
> thermal/drivers/rz2gl: Fix OTP Calibration Register values
> watchdog: rzg2l_wdt: Fix 32bit overflow issue
> watchdog: rzg2l_wdt: Fix Runtime PM usage
> watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context'
> watchdog: rzg2l_wdt: Fix reset control imbalance
> watchdog: rzg2l_wdt: Add error check for reset_control_deassert
> watchdog: rzg2l_wdt: Use force reset for WDT reset
> watchdog: rzg2l_wdt: Add set_timeout callback
>
> Geert Uytterhoeven (1):
> arm64: defconfig: Enable additional support for Renesas platforms
>
> arch/arm64/configs/defconfig | 4 +
> drivers/thermal/Kconfig | 9 ++
> drivers/thermal/Makefile | 1 +
> drivers/thermal/rzg2l_thermal.c | 248 ++++++++++++++++++++++++++++++++
> drivers/watchdog/rzg2l_wdt.c | 83 ++++++-----
> fs/nfs/callback_proc.c | 5 +
> include/linux/bitops.h | 11 +-
> include/linux/dcache.h | 1 +
> include/linux/iommu-helper.h | 4 +-
> include/linux/kernel.h | 173 +---------------------
> include/linux/math.h | 177 +++++++++++++++++++++++
> include/linux/rcu_node_tree.h | 2 +
> include/linux/units.h | 22 ++-
> lib/errname.c | 1 +
> lib/errseq.c | 1 +
> lib/find_bit.c | 3 +-
> lib/math/div64.c | 4 +-
> lib/math/int_pow.c | 2 +-
> lib/math/int_sqrt.c | 3 +-
> lib/math/reciprocal_div.c | 9 +-
> 20 files changed, 544 insertions(+), 219 deletions(-) create mode
> 100644 drivers/thermal/rzg2l_thermal.c create mode 100644
> include/linux/math.h
>
> --
> 2.25.1
^ permalink raw reply [flat|nested] 25+ messages in thread* RE: [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements
2022-07-15 7:46 ` [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements Biju Das
@ 2022-07-15 9:28 ` nobuhiro1.iwamatsu
0 siblings, 0 replies; 25+ messages in thread
From: nobuhiro1.iwamatsu @ 2022-07-15 9:28 UTC (permalink / raw)
To: biju.das.jz, cip-dev, pavel; +Cc: Chris.Paterson2, prabhakar.mahadev-lad.rj
Hi,
>
> I can see patch#2 and #3 of the series landed in [1], but it is not showing up in
> [2] and [3]. Any thoughts on this issue?
Yes, this problem happens sometime. And I don't know why.
All emails have arrived, so I am getting a patch from MUA and applying it.
Best regards,
Nobuhiro
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Friday, July 15, 2022 4:46 PM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯A
> CT) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>
> Cc: Chris Paterson <Chris.Paterson2@renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: RE: [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and
> watchdog driver enhancements
>
> Hi All,
>
> I can see patch#2 and #3 of the series landed in [1], but it is not showing up in
> [2] and [3]. Any thoughts on this issue?
>
>
> [1] https://lists.cip-project.org/g/cip-dev/topics
>
> [2] https://patchwork.kernel.org/project/cip-dev/list/?series=659971
>
> [3]
> https://lore.kernel.org/cip-dev/20220715073916.2321319-1-biju.das.jz@bp.re
> nesas.com/T/#t
>
> Cheers,
> Biju
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: 15 July 2022 08:39
> > To: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> > <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
> > Cc: Chris Paterson <Chris.Paterson2@renesas.com>; Biju Das
> > <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad
> > <prabhakar.mahadev- lad.rj@bp.renesas.com>
> > Subject: [PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and
> > watchdog driver enhancements
> >
> > This patch series aims to add thermal driver support and watchdog
> > driver enhancments for RZ/G2L platform.
> >
> > Resending this patch series as patchwork is not showing
> > patch#2 and #3 of the earlier series.
> >
> > Andy Shevchenko (2):
> > kernel.h: split out mathematical helpers
> > units: Add SI metric prefix definitions
> >
> > Biju Das (10):
> > thermal/drivers: Add TSU driver for RZ/G2L
> > thermal/drivers/rz2gl: Add error check for reset_control_deassert()
> > thermal/drivers/rz2gl: Fix OTP Calibration Register values
> > watchdog: rzg2l_wdt: Fix 32bit overflow issue
> > watchdog: rzg2l_wdt: Fix Runtime PM usage
> > watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context'
> > watchdog: rzg2l_wdt: Fix reset control imbalance
> > watchdog: rzg2l_wdt: Add error check for reset_control_deassert
> > watchdog: rzg2l_wdt: Use force reset for WDT reset
> > watchdog: rzg2l_wdt: Add set_timeout callback
> >
> > Geert Uytterhoeven (1):
> > arm64: defconfig: Enable additional support for Renesas platforms
> >
> > arch/arm64/configs/defconfig | 4 +
> > drivers/thermal/Kconfig | 9 ++
> > drivers/thermal/Makefile | 1 +
> > drivers/thermal/rzg2l_thermal.c | 248
> ++++++++++++++++++++++++++++++++
> > drivers/watchdog/rzg2l_wdt.c | 83 ++++++-----
> > fs/nfs/callback_proc.c | 5 +
> > include/linux/bitops.h | 11 +-
> > include/linux/dcache.h | 1 +
> > include/linux/iommu-helper.h | 4 +-
> > include/linux/kernel.h | 173 +---------------------
> > include/linux/math.h | 177
> +++++++++++++++++++++++
> > include/linux/rcu_node_tree.h | 2 +
> > include/linux/units.h | 22 ++-
> > lib/errname.c | 1 +
> > lib/errseq.c | 1 +
> > lib/find_bit.c | 3 +-
> > lib/math/div64.c | 4 +-
> > lib/math/int_pow.c | 2 +-
> > lib/math/int_sqrt.c | 3 +-
> > lib/math/reciprocal_div.c | 9 +-
> > 20 files changed, 544 insertions(+), 219 deletions(-) create mode
> > 100644 drivers/thermal/rzg2l_thermal.c create mode 100644
> > include/linux/math.h
> >
> > --
> > 2.25.1
^ permalink raw reply [flat|nested] 25+ messages in thread