[PATCH 6.1.y-cip 68/85] dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support

Tommaso Merciai
2025-03-13T01:33:26Z

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 964a80cfbf56f5fa88f09d704c311ed6db0a361f upstream.

Document support for the Serial Communication Interface with FIFO (SCIF)
available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
(R9A07G044) SoC, with the following differences:

- RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
and two for Rx and Tx buffer full, all of which are edge-triggered.
- RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
synchronous and asynchronous modes.
- There are differences in the configuration of certain registers such
as SCSMR, SCFCR, and SCSPTR between the two SoCs.

To handle these differences in the driver, a new SoC-specific compatible
string is added, ensuring proper handling of the unique features and
register configurations of the RZ/V2H(P) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240604170513.522631-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
.../bindings/serial/renesas,scif.yaml | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index 252c1e6102a9..7b997adec92f 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -78,6 +78,8 @@ properties:
- renesas,scif-r9a08g045 # RZ/G3S
- const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback

+ - const: renesas,scif-r9a09g057 # RZ/V2H(P)
+
reg:
maxItems: 1

@@ -92,6 +94,9 @@ properties:
- description: Break interrupt
- description: Data Ready interrupt
- description: Transmit End interrupt
+ - description: Transmit End/Data Ready interrupt
+ - description: Receive buffer full interrupt (EDGE trigger)
+ - description: Transmit buffer empty interrupt (EDGE trigger)
minItems: 4

interrupt-names:
@@ -103,6 +108,9 @@ properties:
- const: bri
- const: dri
- const: tei
+ - const: tei-dri
+ - const: rxi-edge
+ - const: txi-edge

clocks:
minItems: 1
@@ -159,6 +167,7 @@ allOf:
- renesas,rcar-gen3-scif
- renesas,rcar-gen4-scif
- renesas,scif-r9a07g044
+ - renesas,scif-r9a09g057
then:
required:
- resets
@@ -208,9 +217,30 @@ allOf:
properties:
interrupts:
minItems: 6
+ maxItems: 6

interrupt-names:
minItems: 6
+ maxItems: 6
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,scif-r9a09g057
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ interrupts:
+ minItems: 9
+
+ interrupt-names:
+ minItems: 9

unevaluatedProperties: false

--
2.43.0