[PATCH 5.10.y-cip 16/23] dt-bindings: i2c: Document RZ/V2M I2C controller

Biju Das
2023-05-19T08:21:47Z

From: Phil Edworthy <phil.edworthy@renesas.com>

commit ba7a4d15e2c40f8fa37b38e4379e70019227dba0 upstream.

Document Renesas RZ/V2M (r9a09g011) I2C controller bindings.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/i2c/renesas,rzv2m.yaml | 80 +++++++++++++++++++
1 file changed, 80 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml

diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
new file mode 100644
index 000000000000..c46378efc123
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/V2M I2C Bus Interface
+
+maintainers:
+ - Phil Edworthy <phil.edworthy@renesas.com>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,i2c-r9a09g011 # RZ/V2M
+ - const: renesas,rzv2m-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Data transmission/reception interrupt
+ - description: Status interrupt
+
+ interrupt-names:
+ items:
+ - const: tia
+ - const: tis
+
+ clock-frequency:
+ default: 100000
+ enum: [ 100000, 400000 ]
+ description:
+ Desired I2C bus clock frequency in Hz.
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - power-domains
+ - resets
+ - '#address-cells'
+ - '#size-cells'
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/r9a09g011-cpg.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ i2c0: i2c@a4030000 {
+ compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c";
+ reg = <0xa4030000 0x80>;
+ interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "tia", "tis";
+ clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>;
+ resets = <&cpg R9A09G011_IIC_GPA_PRESETN>;
+ power-domains = <&cpg>;
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.25.1