[PATCH 5.10.y-cip 22/23] arm64: dts: renesas: rzv2m evk: Enable i2c

Biju Das
2023-05-19T08:22:07Z

From: Phil Edworthy <phil.edworthy@renesas.com>

commit 39ffd3307fb85ec8a73a8b9d13b0ea923c48b72a upstream.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-4-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../boot/dts/renesas/r9a09g011-v2mevk2.dts | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
index 6d0b1f69ddc4..11e1d51c7c0e 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
@@ -7,6 +7,7 @@

/dts-v1/;
#include "r9a09g011.dtsi"
+#include <dt-bindings/pinctrl/rzv2m-pinctrl.h>

/ {
model = "RZ/V2M Evaluation Kit 2.0";
@@ -53,6 +54,32 @@ &extal_clk {
clock-frequency = <48000000>;
};

+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&pinctrl {
+ i2c0_pins: i2c0 {
+ pinmux = <RZV2M_PORT_PINMUX(5, 0, 2)>, /* SDA */
+ <RZV2M_PORT_PINMUX(5, 1, 2)>; /* SCL */
+ };
+
+ i2c2_pins: i2c2 {
+ pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
+ <RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
+ };
+};
+
&uart0 {
status = "okay";
};
--
2.25.1