[PATCH 6.1.y-cip 13/13] arm64: dts: renesas: rzg2lc-smarc-som: Enable PMIC and built-in RTC

Biju Das
2023-08-16T14:25:39Z

commit bf8abcd7e7a804b825b11828d13c057e8678899a next.

Enable PMIC RAA215300 and the built-in RTC on the RZ/G2LC SMARC
EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230712151342.82690-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
.../boot/dts/renesas/rzg2lc-smarc-som.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
index 78e6e2376b01..8e90cb05cac7 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
@@ -61,6 +61,13 @@ vccq_sdhi0: regulator-vccq-sdhi0 {
gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
regulator-always-on;
};
+
+ /* 32.768kHz crystal */
+ x2: x2-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};

&eth0 {
@@ -97,6 +104,17 @@ &gpu {
mali-supply = <&reg_1p1v>;
};

+&i2c2 {
+ raa215300: pmic@12 {
+ compatible = "renesas,raa215300";
+ reg = <0x12>, <0x6f>;
+ reg-names = "main", "rtc";
+
+ clocks = <&x2>;
+ clock-names = "xin";
+ };
+};
+
&ostm1 {
status = "okay";
};
--
2.25.1