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From: Pavel Machek <pavel@denx.de>
To: nobuhiro1.iwamatsu@toshiba.co.jp
Cc: biju.das.jz@bp.renesas.com, cip-dev@lists.cip-project.org,
	pavel@denx.de, claudiu.beznea.uj@bp.renesas.com
Subject: Re: [PATCH 5.10.y-cip 00/11] Add versa3 clk generator support
Date: Fri, 24 Nov 2023 09:42:31 +0100	[thread overview]
Message-ID: <ZWBh992Lae38o/3t@duo.ucw.cz> (raw)
In-Reply-To: <TYVPR01MB1124586158EA9F30C835538AC92B9A@TYVPR01MB11245.jpnprd01.prod.outlook.com>

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Hi!

> > All the patches are cherry-picked from the mainline.
> > 
> > Biju Das (7):
> >   dt-bindings: clock: Add Renesas versa3 clock generator bindings
> >   dt-bindings: clock: versaclock3: Add description for #clock-cells
> >     property
> >   clk: Add support for versa3 clock driver
> >   clk: vc3: Fix 64 by 64 division
> >   clk: vc3: Fix output clock mapping
> >   clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum
> >   arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk
> > 
> > Daniel Palmer (1):
> >   clk: fixed: add devm helper for clk_hw_register_fixed_factor()
> > 
> > Marek Vasut (1):
> >   clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index()
> > 
> > Marijn Suijten (1):
> >   clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
> > 
> > Samuel Holland (1):
> >   clk: fixed: Remove Allwinner A10 special-case logic
> > 
> 
> I reviewed this series, LGTM. So, I can apply this series.
> 
> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

Thanks for review, applied.

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,        Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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      reply	other threads:[~2023-11-24  8:42 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-22 14:28 [PATCH 5.10.y-cip 00/11] Add versa3 clk generator support Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 01/11] dt-bindings: clock: Add Renesas versa3 clock generator bindings Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 02/11] dt-bindings: clock: versaclock3: Add description for #clock-cells property Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 03/11] clk: fixed: add devm helper for clk_hw_register_fixed_factor() Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 04/11] clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index() Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 05/11] clk: fixed: Remove Allwinner A10 special-case logic Biju Das
2023-11-22 21:04   ` Pavel Machek
2023-11-22 14:28 ` [PATCH 5.10.y-cip 06/11] clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw() Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 07/11] clk: Add support for versa3 clock driver Biju Das
2023-11-22 21:07   ` Pavel Machek
2023-11-23  8:30     ` Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 08/11] clk: vc3: Fix 64 by 64 division Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 09/11] clk: vc3: Fix output clock mapping Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 10/11] clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum Biju Das
2023-11-22 14:28 ` [PATCH 5.10.y-cip 11/11] arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk Biju Das
2023-11-22 21:03 ` [PATCH 5.10.y-cip 00/11] Add versa3 clk generator support Pavel Machek
2023-11-23  7:25   ` Biju Das
2023-11-23 22:15 ` nobuhiro1.iwamatsu
2023-11-24  8:42   ` Pavel Machek [this message]

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