Re: [PATCH 6.1.y-cip 0/6] Versa3 clk driver improvements

[Pavel Machek <pavel@denx.de>]

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Hi!

> > This patch series aims to improve versa3 clock driver.
> > 
> > All the patches are cherry-picked from the mainline.
> > 
> > Biju Das (6):
> >   arm64: defconfig: Enable Renesas VersaClock 3 clock generator config
> >   clk: versaclock3: Update vc3_get_div() to avoid divide by zero
> >   clk: versaclock3: Avoid unnecessary padding
> >   clk: versaclock3: Use u8 return type for get_parent() callback
> >   clk: versaclock3: Add missing space between ')' and '{'
> >   clk: versaclock3: Drop ret variable
> > 
> >  arch/arm64/configs/defconfig  |  1 +
> >  drivers/clk/clk-versaclock3.c | 88
> > ++++++++++++++++-------------------
> >  2 files changed, 41 insertions(+), 48 deletions(-)
> 
> I reviewed this series, so LGTM.
> I will apply this series, if we have no other comments.
> 
> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

Thanks for review, it tests okay, so I applied the series and pushed
it out.

Best regards,
								Pavel
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