* [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support
@ 2024-10-02 17:03 Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 01/16] arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device node Biju Das
` (17 more replies)
0 siblings, 18 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
This patch series aim to add support for
1) RZ/G2UL display
2) Audio full duplex
3) Auto loading for CSI driver
All the patches are cherry-picked from the mainline
Biju Das (15):
arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device
node
pinctrl: renesas: rzg2l: Use dev_err_probe()
media: platform: rzg2l-cru: rzg2l-csi2: Add missing
MODULE_DEVICE_TABLE
ASoC: sh: rz-ssi: Add full duplex support
clk: renesas: r9a07g043: Add LCDC clock and reset entries
media: dt-bindings: media: renesas,vsp1: Document RZ/V2L VSPD bindings
media: dt-bindings: media: renesas,vsp1: Document RZ/G2UL VSPD
bindings
media: dt-bindings: media: renesas,fcp: Document RZ/{G2L,V2L} FCPVD
bindings
media: dt-bindings: media: renesas,fcp: Document RZ/G2UL FCPVD
bindings
dt-bindings: display: renesas,rzg2l-du: Document RZ/G2UL DU bindings
drm: renesas: rz-du: Add RZ/G2UL DU Support
arm64: dts: renesas: r9a07g043u: Add FCPVD node
arm64: dts: renesas: r9a07g043u: Add VSPD node
arm64: dts: renesas: r9a07g043u: Add DU node
arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
Lad Prabhakar (1):
drm: renesas: Move RZ/G2L MIPI DSI driver to rz-du
.../bindings/display/renesas,rzg2l-du.yaml | 32 ++-
.../bindings/media/renesas,fcp.yaml | 47 +++-
.../bindings/media/renesas,vsp1.yaml | 14 +-
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 4 +
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 49 ++++
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 50 ++++
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 4 +
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 4 +
.../boot/dts/renesas/rz-smarc-common.dtsi | 3 -
.../boot/dts/renesas/rz-smarc-du-adv7513.dtsi | 76 ++++++
drivers/clk/renesas/r9a07g043-cpg.c | 12 +
drivers/gpu/drm/renesas/rcar-du/Kconfig | 8 -
drivers/gpu/drm/renesas/rcar-du/Makefile | 2 -
drivers/gpu/drm/renesas/rz-du/Kconfig | 8 +
drivers/gpu/drm/renesas/rz-du/Makefile | 2 +
drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c | 8 +-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c | 11 +
drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c | 3 +-
.../{rcar-du => rz-du}/rzg2l_mipi_dsi.c | 0
.../{rcar-du => rz-du}/rzg2l_mipi_dsi_regs.h | 0
.../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 1 +
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 37 +--
sound/soc/sh/rz-ssi.c | 257 +++++++++++++-----
23 files changed, 506 insertions(+), 126 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi
rename drivers/gpu/drm/renesas/{rcar-du => rz-du}/rzg2l_mipi_dsi.c (100%)
rename drivers/gpu/drm/renesas/{rcar-du => rz-du}/rzg2l_mipi_dsi_regs.h (100%)
--
2.43.0
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 01/16] arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device node
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
@ 2024-10-02 17:03 ` Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe() Biju Das
` (16 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit bdfa062d14b22e36207c219206b2bf770d5363b3 upstream.
Move regulator-vbus device node from common to the usbphy-ctrl device node
of the individual SoC dtsi's as it embeds the vbus regulator.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240715140705.334183-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi | 3 ---
4 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 6212ee550f33..7b07bcb3be88 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -725,6 +725,10 @@ phyrst: usbphy-ctrl@11c40000 {
power-domains = <&cpg>;
#reset-cells = <1>;
status = "disabled";
+
+ usb0_vbus_otg: regulator-vbus {
+ regulator-name = "vbus";
+ };
};
ohci0: usb@11c50000 {
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 8e4fadaa00a0..f17359934ee6 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -1128,6 +1128,10 @@ phyrst: usbphy-ctrl@11c40000 {
power-domains = <&cpg>;
#reset-cells = <1>;
status = "disabled";
+
+ usb0_vbus_otg: regulator-vbus {
+ regulator-name = "vbus";
+ };
};
ohci0: usb@11c50000 {
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 4aac7374b5fc..7ef3d8c78684 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -1136,6 +1136,10 @@ phyrst: usbphy-ctrl@11c40000 {
power-domains = <&cpg>;
#reset-cells = <1>;
status = "disabled";
+
+ usb0_vbus_otg: regulator-vbus {
+ regulator-name = "vbus";
+ };
};
ohci0: usb@11c50000 {
diff --git a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
index 90b20324c5d1..111c5f0ecec0 100644
--- a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
@@ -131,9 +131,6 @@ &ohci1 {
&phyrst {
status = "okay";
- usb0_vbus_otg: regulator-vbus {
- regulator-name = "vbus";
- };
};
&scif0 {
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe()
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 01/16] arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device node Biju Das
@ 2024-10-02 17:03 ` Biju Das
2024-10-03 5:28 ` nobuhiro1.iwamatsu
2024-10-02 17:03 ` [PATCH 6.1.y-cip 03/16] media: platform: rzg2l-cru: rzg2l-csi2: Add missing MODULE_DEVICE_TABLE Biju Das
` (15 subsequent siblings)
17 siblings, 1 reply; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit f73f63b24491fa43641daf3b6162d2a451bd8481 upstream.
Replace dev_err()->dev_err_probe() to simpilfy probe
helper functions.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240728090421.7136-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 37 +++++++++----------------
1 file changed, 13 insertions(+), 24 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 6f49da4bd327..0cae3e75b26a 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -2200,16 +2200,13 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl *pctrl)
return -EPROBE_DEFER;
ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &of_args);
- if (ret) {
- dev_err(pctrl->dev, "Unable to parse gpio-ranges\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(pctrl->dev, ret, "Unable to parse gpio-ranges\n");
if (of_args.args[0] != 0 || of_args.args[1] != 0 ||
- of_args.args[2] != pctrl->data->n_port_pins) {
- dev_err(pctrl->dev, "gpio-ranges does not match selected SOC\n");
- return -EINVAL;
- }
+ of_args.args[2] != pctrl->data->n_port_pins)
+ return dev_err_probe(pctrl->dev, -EINVAL,
+ "gpio-ranges does not match selected SOC\n");
chip->names = pctrl->data->port_pins;
chip->request = rzg2l_gpio_request;
@@ -2241,10 +2238,8 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl *pctrl)
pctrl->gpio_range.name = chip->label;
pctrl->gpio_range.gc = chip;
ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
- if (ret) {
- dev_err(pctrl->dev, "failed to add GPIO controller\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(pctrl->dev, ret, "failed to add GPIO controller\n");
dev_dbg(pctrl->dev, "Registered gpio controller\n");
@@ -2325,22 +2320,16 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl *pctrl)
ret = devm_pinctrl_register_and_init(pctrl->dev, &pctrl->desc, pctrl,
&pctrl->pctl);
- if (ret) {
- dev_err(pctrl->dev, "pinctrl registration failed\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(pctrl->dev, ret, "pinctrl registration failed\n");
ret = pinctrl_enable(pctrl->pctl);
- if (ret) {
- dev_err(pctrl->dev, "pinctrl enable failed\n");
- return ret;
- }
+ if (ret)
+ dev_err_probe(pctrl->dev, ret, "pinctrl enable failed\n");
ret = rzg2l_gpio_register(pctrl);
- if (ret) {
- dev_err(pctrl->dev, "failed to add GPIO chip: %i\n", ret);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(pctrl->dev, ret, "failed to add GPIO chip\n");
return 0;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 03/16] media: platform: rzg2l-cru: rzg2l-csi2: Add missing MODULE_DEVICE_TABLE
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 01/16] arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device node Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe() Biju Das
@ 2024-10-02 17:03 ` Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support Biju Das
` (14 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 07668fb0f867388bfdac0b60dbf51a4ad789f8e7 upstream.
The rzg2l-csi2 driver can be compiled as a module, but lacks
MODULE_DEVICE_TABLE() and will therefore not be loaded automatically.
Fix this.
Fixes: 51e8415e39a9 ("media: platform: Add Renesas RZ/G2L MIPI CSI-2 receiver driver")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20240731164935.308994-1-biju.das.jz@bp.renesas.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
index bd06cdb27ec9..e1668a4d1256 100644
--- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
+++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
@@ -864,6 +864,7 @@ static const struct of_device_id rzg2l_csi2_of_table[] = {
{ .compatible = "renesas,rzg2l-csi2", },
{ /* sentinel */ }
};
+MODULE_DEVICE_TABLE(of, rzg2l_csi2_of_table);
static struct platform_driver rzg2l_csi2_pdrv = {
.remove = rzg2l_csi2_remove,
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (2 preceding siblings ...)
2024-10-02 17:03 ` [PATCH 6.1.y-cip 03/16] media: platform: rzg2l-cru: rzg2l-csi2: Add missing MODULE_DEVICE_TABLE Biju Das
@ 2024-10-02 17:03 ` Biju Das
2024-10-03 5:53 ` nobuhiro1.iwamatsu
2024-10-02 17:03 ` [PATCH 6.1.y-cip 05/16] clk: renesas: r9a07g043: Add LCDC clock and reset entries Biju Das
` (13 subsequent siblings)
17 siblings, 1 reply; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 4f8cd05a43058b165b83f12f656e60415d2ff5be upstream.
Add full duplex support, to support simultaneous
playback/record on the same ssi channel.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20240715092322.119879-1-biju.das.jz@bp.renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
sound/soc/sh/rz-ssi.c | 257 ++++++++++++++++++++++++++++++------------
1 file changed, 182 insertions(+), 75 deletions(-)
diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c
index d502aa55c5a8..6972b70baf73 100644
--- a/sound/soc/sh/rz-ssi.c
+++ b/sound/soc/sh/rz-ssi.c
@@ -53,6 +53,7 @@
#define SSIFCR_RIE BIT(2)
#define SSIFCR_TFRST BIT(1)
#define SSIFCR_RFRST BIT(0)
+#define SSIFCR_FIFO_RST (SSIFCR_TFRST | SSIFCR_RFRST)
#define SSIFSR_TDC_MASK 0x3f
#define SSIFSR_TDC_SHIFT 24
@@ -131,6 +132,14 @@ struct rz_ssi_priv {
bool lrckp_fsync_fall; /* LR clock polarity (SSICR.LRCKP) */
bool bckp_rise; /* Bit clock polarity (SSICR.BCKP) */
bool dma_rt;
+
+ /* Full duplex communication support */
+ struct {
+ unsigned int rate;
+ unsigned int channels;
+ unsigned int sample_width;
+ unsigned int sample_bits;
+ } hw_params_cache;
};
static void rz_ssi_dma_complete(void *data);
@@ -209,6 +218,11 @@ static bool rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
return ret;
}
+static inline bool rz_ssi_is_stream_running(struct rz_ssi_stream *strm)
+{
+ return strm->substream && strm->running;
+}
+
static void rz_ssi_stream_init(struct rz_ssi_stream *strm,
struct snd_pcm_substream *substream)
{
@@ -304,13 +318,53 @@ static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate,
return 0;
}
+static void rz_ssi_set_idle(struct rz_ssi_priv *ssi)
+{
+ int timeout;
+
+ /* Disable irqs */
+ rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
+ SSICR_RUIEN | SSICR_ROIEN, 0);
+ rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_TIE | SSIFCR_RIE, 0);
+
+ /* Clear all error flags */
+ rz_ssi_reg_mask_setl(ssi, SSISR,
+ (SSISR_TOIRQ | SSISR_TUIRQ | SSISR_ROIRQ |
+ SSISR_RUIRQ), 0);
+
+ /* Wait for idle */
+ timeout = 100;
+ while (--timeout) {
+ if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ)
+ break;
+ udelay(1);
+ }
+
+ if (!timeout)
+ dev_info(ssi->dev, "timeout waiting for SSI idle\n");
+
+ /* Hold FIFOs in reset */
+ rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
+ SSIFCR_TFRST | SSIFCR_RFRST);
+}
+
static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
{
bool is_play = rz_ssi_stream_is_play(ssi, strm->substream);
+ bool is_full_duplex;
u32 ssicr, ssifcr;
+ is_full_duplex = rz_ssi_is_stream_running(&ssi->playback) ||
+ rz_ssi_is_stream_running(&ssi->capture);
ssicr = rz_ssi_reg_readl(ssi, SSICR);
- ssifcr = rz_ssi_reg_readl(ssi, SSIFCR) & ~0xF;
+ ssifcr = rz_ssi_reg_readl(ssi, SSIFCR);
+ if (!is_full_duplex) {
+ ssifcr &= ~0xF;
+ } else {
+ rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0);
+ rz_ssi_set_idle(ssi);
+ ssifcr &= ~SSIFCR_FIFO_RST;
+ }
/* FIFO interrupt thresholds */
if (rz_ssi_is_dma_enabled(ssi))
@@ -323,10 +377,14 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
/* enable IRQ */
if (is_play) {
ssicr |= SSICR_TUIEN | SSICR_TOIEN;
- ssifcr |= SSIFCR_TIE | SSIFCR_RFRST;
+ ssifcr |= SSIFCR_TIE;
+ if (!is_full_duplex)
+ ssifcr |= SSIFCR_RFRST;
} else {
ssicr |= SSICR_RUIEN | SSICR_ROIEN;
- ssifcr |= SSIFCR_RIE | SSIFCR_TFRST;
+ ssifcr |= SSIFCR_RIE;
+ if (!is_full_duplex)
+ ssifcr |= SSIFCR_TFRST;
}
rz_ssi_reg_writel(ssi, SSICR, ssicr);
@@ -338,7 +396,11 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
SSISR_RUIRQ), 0);
strm->running = 1;
- ssicr |= is_play ? SSICR_TEN : SSICR_REN;
+ if (is_full_duplex)
+ ssicr |= SSICR_TEN | SSICR_REN;
+ else
+ ssicr |= is_play ? SSICR_TEN : SSICR_REN;
+
rz_ssi_reg_writel(ssi, SSICR, ssicr);
return 0;
@@ -346,10 +408,12 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
{
- int timeout;
-
strm->running = 0;
+ if (rz_ssi_is_stream_running(&ssi->playback) ||
+ rz_ssi_is_stream_running(&ssi->capture))
+ return 0;
+
/* Disable TX/RX */
rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0);
@@ -357,30 +421,7 @@ static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
if (rz_ssi_is_dma_enabled(ssi))
dmaengine_terminate_async(strm->dma_ch);
- /* Disable irqs */
- rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
- SSICR_RUIEN | SSICR_ROIEN, 0);
- rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_TIE | SSIFCR_RIE, 0);
-
- /* Clear all error flags */
- rz_ssi_reg_mask_setl(ssi, SSISR,
- (SSISR_TOIRQ | SSISR_TUIRQ | SSISR_ROIRQ |
- SSISR_RUIRQ), 0);
-
- /* Wait for idle */
- timeout = 100;
- while (--timeout) {
- if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ)
- break;
- udelay(1);
- }
-
- if (!timeout)
- dev_info(ssi->dev, "timeout waiting for SSI idle\n");
-
- /* Hold FIFOs in reset */
- rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
- SSIFCR_TFRST | SSIFCR_RFRST);
+ rz_ssi_set_idle(ssi);
return 0;
}
@@ -513,66 +554,90 @@ static int rz_ssi_pio_send(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
static irqreturn_t rz_ssi_interrupt(int irq, void *data)
{
- struct rz_ssi_stream *strm = NULL;
+ struct rz_ssi_stream *strm_playback = NULL;
+ struct rz_ssi_stream *strm_capture = NULL;
struct rz_ssi_priv *ssi = data;
u32 ssisr = rz_ssi_reg_readl(ssi, SSISR);
if (ssi->playback.substream)
- strm = &ssi->playback;
- else if (ssi->capture.substream)
- strm = &ssi->capture;
- else
+ strm_playback = &ssi->playback;
+ if (ssi->capture.substream)
+ strm_capture = &ssi->capture;
+
+ if (!strm_playback && !strm_capture)
return IRQ_HANDLED; /* Left over TX/RX interrupt */
if (irq == ssi->irq_int) { /* error or idle */
- if (ssisr & SSISR_TUIRQ)
- strm->uerr_num++;
- if (ssisr & SSISR_TOIRQ)
- strm->oerr_num++;
- if (ssisr & SSISR_RUIRQ)
- strm->uerr_num++;
- if (ssisr & SSISR_ROIRQ)
- strm->oerr_num++;
-
- if (ssisr & (SSISR_TUIRQ | SSISR_TOIRQ | SSISR_RUIRQ |
- SSISR_ROIRQ)) {
- /* Error handling */
- /* You must reset (stop/restart) after each interrupt */
- rz_ssi_stop(ssi, strm);
-
- /* Clear all flags */
- rz_ssi_reg_mask_setl(ssi, SSISR, SSISR_TOIRQ |
- SSISR_TUIRQ | SSISR_ROIRQ |
- SSISR_RUIRQ, 0);
-
- /* Add/remove more data */
- strm->transfer(ssi, strm);
-
- /* Resume */
- rz_ssi_start(ssi, strm);
+ bool is_stopped = false;
+ int i, count;
+
+ if (rz_ssi_is_dma_enabled(ssi))
+ count = 4;
+ else
+ count = 1;
+
+ if (ssisr & (SSISR_RUIRQ | SSISR_ROIRQ | SSISR_TUIRQ | SSISR_TOIRQ))
+ is_stopped = true;
+
+ if (ssi->capture.substream && is_stopped) {
+ if (ssisr & SSISR_RUIRQ)
+ strm_capture->uerr_num++;
+ if (ssisr & SSISR_ROIRQ)
+ strm_capture->oerr_num++;
+
+ rz_ssi_stop(ssi, strm_capture);
}
+
+ if (ssi->playback.substream && is_stopped) {
+ if (ssisr & SSISR_TUIRQ)
+ strm_playback->uerr_num++;
+ if (ssisr & SSISR_TOIRQ)
+ strm_playback->oerr_num++;
+
+ rz_ssi_stop(ssi, strm_playback);
+ }
+
+ /* Clear all flags */
+ rz_ssi_reg_mask_setl(ssi, SSISR, SSISR_TOIRQ | SSISR_TUIRQ |
+ SSISR_ROIRQ | SSISR_RUIRQ, 0);
+
+ /* Add/remove more data */
+ if (ssi->capture.substream && is_stopped) {
+ for (i = 0; i < count; i++)
+ strm_capture->transfer(ssi, strm_capture);
+ }
+
+ if (ssi->playback.substream && is_stopped) {
+ for (i = 0; i < count; i++)
+ strm_playback->transfer(ssi, strm_playback);
+ }
+
+ /* Resume */
+ if (ssi->playback.substream && is_stopped)
+ rz_ssi_start(ssi, &ssi->playback);
+ if (ssi->capture.substream && is_stopped)
+ rz_ssi_start(ssi, &ssi->capture);
}
- if (!strm->running)
+ if (!rz_ssi_is_stream_running(&ssi->playback) &&
+ !rz_ssi_is_stream_running(&ssi->capture))
return IRQ_HANDLED;
/* tx data empty */
- if (irq == ssi->irq_tx)
- strm->transfer(ssi, &ssi->playback);
+ if (irq == ssi->irq_tx && rz_ssi_is_stream_running(&ssi->playback))
+ strm_playback->transfer(ssi, &ssi->playback);
/* rx data full */
- if (irq == ssi->irq_rx) {
- strm->transfer(ssi, &ssi->capture);
+ if (irq == ssi->irq_rx && rz_ssi_is_stream_running(&ssi->capture)) {
+ strm_capture->transfer(ssi, &ssi->capture);
rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
}
if (irq == ssi->irq_rt) {
- struct snd_pcm_substream *substream = strm->substream;
-
- if (rz_ssi_stream_is_play(ssi, substream)) {
- strm->transfer(ssi, &ssi->playback);
+ if (ssi->playback.substream) {
+ strm_playback->transfer(ssi, &ssi->playback);
} else {
- strm->transfer(ssi, &ssi->capture);
+ strm_capture->transfer(ssi, &ssi->capture);
rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
}
}
@@ -732,9 +797,12 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
/* Soft Reset */
- rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST);
- rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0);
- udelay(5);
+ if (!rz_ssi_is_stream_running(&ssi->playback) &&
+ !rz_ssi_is_stream_running(&ssi->capture)) {
+ rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST);
+ rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0);
+ udelay(5);
+ }
rz_ssi_stream_init(strm, substream);
@@ -825,14 +893,41 @@ static int rz_ssi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return 0;
}
+static bool rz_ssi_is_valid_hw_params(struct rz_ssi_priv *ssi, unsigned int rate,
+ unsigned int channels,
+ unsigned int sample_width,
+ unsigned int sample_bits)
+{
+ if (ssi->hw_params_cache.rate != rate ||
+ ssi->hw_params_cache.channels != channels ||
+ ssi->hw_params_cache.sample_width != sample_width ||
+ ssi->hw_params_cache.sample_bits != sample_bits)
+ return false;
+
+ return true;
+}
+
+static void rz_ssi_cache_hw_params(struct rz_ssi_priv *ssi, unsigned int rate,
+ unsigned int channels,
+ unsigned int sample_width,
+ unsigned int sample_bits)
+{
+ ssi->hw_params_cache.rate = rate;
+ ssi->hw_params_cache.channels = channels;
+ ssi->hw_params_cache.sample_width = sample_width;
+ ssi->hw_params_cache.sample_bits = sample_bits;
+}
+
static int rz_ssi_dai_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai);
+ struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream);
unsigned int sample_bits = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
unsigned int channels = params_channels(params);
+ unsigned int rate = params_rate(params);
if (sample_bits != 16) {
dev_err(ssi->dev, "Unsupported sample width: %d\n",
@@ -846,8 +941,20 @@ static int rz_ssi_dai_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
- return rz_ssi_clk_setup(ssi, params_rate(params),
- params_channels(params));
+ if (rz_ssi_is_stream_running(&ssi->playback) ||
+ rz_ssi_is_stream_running(&ssi->capture)) {
+ if (rz_ssi_is_valid_hw_params(ssi, rate, channels,
+ strm->sample_width, sample_bits))
+ return 0;
+
+ dev_err(ssi->dev, "Full duplex needs same HW params\n");
+ return -EINVAL;
+ }
+
+ rz_ssi_cache_hw_params(ssi, rate, channels, strm->sample_width,
+ sample_bits);
+
+ return rz_ssi_clk_setup(ssi, rate, channels);
}
static const struct snd_soc_dai_ops rz_ssi_dai_ops = {
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 05/16] clk: renesas: r9a07g043: Add LCDC clock and reset entries
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (3 preceding siblings ...)
2024-10-02 17:03 ` [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support Biju Das
@ 2024-10-02 17:03 ` Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 06/16] media: dt-bindings: media: renesas,vsp1: Document RZ/V2L VSPD bindings Biju Das
` (12 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 10dfa837da4f5319ef6871c7cc7357da190c482f upstream.
Add LCDC clock and reset entries to CPG driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240709135152.185042-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/clk/renesas/r9a07g043-cpg.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/renesas/r9a07g043-cpg.c b/drivers/clk/renesas/r9a07g043-cpg.c
index cf0827d84af6..ad55a2b640aa 100644
--- a/drivers/clk/renesas/r9a07g043-cpg.c
+++ b/drivers/clk/renesas/r9a07g043-cpg.c
@@ -52,6 +52,8 @@ enum clk_ids {
CLK_PLL5,
CLK_PLL5_500,
CLK_PLL5_250,
+ CLK_PLL5_FOUTPOSTDIV,
+ CLK_DSI_DIV,
#endif
CLK_PLL6,
CLK_PLL6_250,
@@ -120,6 +122,7 @@ static const struct cpg_core_clk r9a07g043_core_clks[] __initconst = {
DEF_FIXED(".pll5", CLK_PLL5, CLK_EXTAL, 125, 1),
DEF_FIXED(".pll5_500", CLK_PLL5_500, CLK_PLL5, 1, 6),
DEF_FIXED(".pll5_250", CLK_PLL5_250, CLK_PLL5_500, 1, 2),
+ DEF_PLL5_FOUTPOSTDIV(".pll5_foutpostdiv", CLK_PLL5_FOUTPOSTDIV, CLK_EXTAL),
#endif
DEF_FIXED(".pll6", CLK_PLL6, CLK_EXTAL, 125, 6),
DEF_FIXED(".pll6_250", CLK_PLL6_250, CLK_PLL6, 1, 2),
@@ -146,6 +149,8 @@ static const struct cpg_core_clk r9a07g043_core_clks[] __initconst = {
#ifdef CONFIG_ARM64
DEF_FIXED("M2", R9A07G043_CLK_M2, CLK_PLL3_533, 1, 2),
DEF_FIXED("M2_DIV2", CLK_M2_DIV2, R9A07G043_CLK_M2, 1, 2),
+ DEF_DSI_DIV("DSI_DIV", CLK_DSI_DIV, CLK_PLL5_FOUTPOSTDIV, CLK_SET_RATE_PARENT),
+ DEF_FIXED("M3", R9A07G043_CLK_M3, CLK_DSI_DIV, 1, 1),
#endif
};
@@ -209,6 +214,12 @@ static struct rzg2l_mod_clk r9a07g043_mod_clks[] = {
0x564, 2),
DEF_MOD("cru_aclk", R9A07G043_CRU_ACLK, R9A07G043_CLK_M0,
0x564, 3),
+ DEF_COUPLED("lcdc_clk_a", R9A07G043_LCDC_CLK_A, R9A07G043_CLK_M0,
+ 0x56c, 0),
+ DEF_COUPLED("lcdc_clk_p", R9A07G043_LCDC_CLK_P, R9A07G043_CLK_ZT,
+ 0x56c, 0),
+ DEF_MOD("lcdc_clk_d", R9A07G043_LCDC_CLK_D, R9A07G043_CLK_M3,
+ 0x56c, 1),
#endif
DEF_MOD("ssi0_pclk", R9A07G043_SSI0_PCLK2, R9A07G043_CLK_P0,
0x570, 0),
@@ -309,6 +320,7 @@ static struct rzg2l_reset r9a07g043_resets[] = {
DEF_RST(R9A07G043_CRU_CMN_RSTB, 0x864, 0),
DEF_RST(R9A07G043_CRU_PRESETN, 0x864, 1),
DEF_RST(R9A07G043_CRU_ARESETN, 0x864, 2),
+ DEF_RST(R9A07G043_LCDC_RESET_N, 0x86c, 0),
#endif
DEF_RST(R9A07G043_SSI0_RST_M2_REG, 0x870, 0),
DEF_RST(R9A07G043_SSI1_RST_M2_REG, 0x870, 1),
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 06/16] media: dt-bindings: media: renesas,vsp1: Document RZ/V2L VSPD bindings
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (4 preceding siblings ...)
2024-10-02 17:03 ` [PATCH 6.1.y-cip 05/16] clk: renesas: r9a07g043: Add LCDC clock and reset entries Biju Das
@ 2024-10-02 17:03 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 07/16] media: dt-bindings: media: renesas,vsp1: Document RZ/G2UL " Biju Das
` (11 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:03 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit b8c41ec1fb552a5e6c851887374e32233232302e upstream.
Document VSPD found in RZ/V2L SoC. The VSPD block is identical to RZ/G2L
SoC and therefore use RZ/G2L fallback to avoid any driver changes.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../devicetree/bindings/media/renesas,vsp1.yaml | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
index 7a8f32473852..3265e922647c 100644
--- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
@@ -16,10 +16,15 @@ description:
properties:
compatible:
- enum:
- - renesas,r9a07g044-vsp2 # RZ/G2L
- - renesas,vsp1 # R-Car Gen2 and RZ/G1
- - renesas,vsp2 # R-Car Gen3 and RZ/G2
+ oneOf:
+ - enum:
+ - renesas,r9a07g044-vsp2 # RZ/G2L
+ - renesas,vsp1 # R-Car Gen2 and RZ/G1
+ - renesas,vsp2 # R-Car Gen3 and RZ/G2
+ - items:
+ - enum:
+ - renesas,r9a07g054-vsp2 # RZ/V2L
+ - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
reg:
maxItems: 1
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 07/16] media: dt-bindings: media: renesas,vsp1: Document RZ/G2UL VSPD bindings
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (5 preceding siblings ...)
2024-10-02 17:03 ` [PATCH 6.1.y-cip 06/16] media: dt-bindings: media: renesas,vsp1: Document RZ/V2L VSPD bindings Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 08/16] media: dt-bindings: media: renesas,fcp: Document RZ/{G2L,V2L} FCPVD bindings Biju Das
` (10 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 97111ab5ed9ae0b6ee4c0c34a416ca76f900cea8 upstream.
Document VSPD found in RZ/G2UL SoC. The VSPD block is identical to RZ/G2L
SoC and therefore use RZ/G2L fallback to avoid any driver changes.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/media/renesas,vsp1.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
index 3265e922647c..1a03e67462a4 100644
--- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
@@ -23,6 +23,7 @@ properties:
- renesas,vsp2 # R-Car Gen3 and RZ/G2
- items:
- enum:
+ - renesas,r9a07g043u-vsp2 # RZ/G2UL
- renesas,r9a07g054-vsp2 # RZ/V2L
- const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 08/16] media: dt-bindings: media: renesas,fcp: Document RZ/{G2L,V2L} FCPVD bindings
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (6 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 07/16] media: dt-bindings: media: renesas,vsp1: Document RZ/G2UL " Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 09/16] media: dt-bindings: media: renesas,fcp: Document RZ/G2UL " Biju Das
` (9 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 81442e3e6c0f7de9df64addc53d49079b8045b05 upstream.
Document FCPVD found in RZ/G2L alike SoCs. FCPVD block is similar to
FCP for VSP found on R-Car SoC's . It has 3 clocks compared to 1
clock on fcpv. Introduce new compatibles renesas,r9a07g044-fcpvd
for RZ/G2{L,LC} and renesas,r9a07g054-fcpvd for RZ/V2L to handle this
difference.
The 3 clocks are shared between du, vspd and fcpvd. No driver changes
are required as generic compatible string "renesas,fcpv" will be used
as a fallback.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/media/renesas,fcp.yaml | 45 ++++++++++++++++---
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml
index 43f2fed8cd33..c6abe719881b 100644
--- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml
@@ -21,15 +21,22 @@ description: |
properties:
compatible:
- enum:
- - renesas,fcpv # FCP for VSP
- - renesas,fcpf # FCP for FDP
+ oneOf:
+ - enum:
+ - renesas,fcpv # FCP for VSP
+ - renesas,fcpf # FCP for FDP
+ - items:
+ - enum:
+ - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
+ - renesas,r9a07g054-fcpvd # RZ/V2L
+ - const: renesas,fcpv # Generic FCP for VSP fallback
reg:
maxItems: 1
- clocks:
- maxItems: 1
+ clocks: true
+
+ clock-names: true
iommus:
maxItems: 1
@@ -49,6 +56,34 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,r9a07g044-fcpvd
+ - renesas,r9a07g054-fcpvd
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Main clock
+ - description: Register access clock
+ - description: Video clock
+ clock-names:
+ items:
+ - const: aclk
+ - const: pclk
+ - const: vclk
+ required:
+ - clock-names
+ else:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
examples:
# R8A7795 (R-Car H3) FCP for VSP-D1
- |
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 09/16] media: dt-bindings: media: renesas,fcp: Document RZ/G2UL FCPVD bindings
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (7 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 08/16] media: dt-bindings: media: renesas,fcp: Document RZ/{G2L,V2L} FCPVD bindings Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 10/16] dt-bindings: display: renesas,rzg2l-du: Document RZ/G2UL DU bindings Biju Das
` (8 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit ec1d98e9c60a7882d3c96c79eb67b92a34c5352f upstream.
Document FCPVD found in RZ/G2UL SoC. FCPVD block is similar to FCP for
VSP found on RZ/{G2L,G2LC,V2L} SoCs.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/media/renesas,fcp.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml
index c6abe719881b..f94dacd96278 100644
--- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml
@@ -27,6 +27,7 @@ properties:
- renesas,fcpf # FCP for FDP
- items:
- enum:
+ - renesas,r9a07g043u-fcpvd # RZ/G2UL
- renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
- renesas,r9a07g054-fcpvd # RZ/V2L
- const: renesas,fcpv # Generic FCP for VSP fallback
@@ -62,6 +63,7 @@ allOf:
compatible:
contains:
enum:
+ - renesas,r9a07g043u-fcpvd
- renesas,r9a07g044-fcpvd
- renesas,r9a07g054-fcpvd
then:
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 10/16] dt-bindings: display: renesas,rzg2l-du: Document RZ/G2UL DU bindings
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (8 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 09/16] media: dt-bindings: media: renesas,fcp: Document RZ/G2UL " Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 11/16] drm: renesas: Move RZ/G2L MIPI DSI driver to rz-du Biju Das
` (7 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 2ef7cb1cea7d56348c8f3d43bf1b891ddd468bb2 upstream.
Document DU found in RZ/G2UL SoC. The DU block is identical to RZ/G2L
SoC, but has only DPI interface.
While at it, add missing required property port@1 for RZ/G2L and RZ/V2L
SoCs. Currently there is no user for the DPI interface and hence there
won't be any ABI breakage for adding port@1 as required property for
RZ/G2L and RZ/V2L SoCs.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240822162320.5084-2-biju.das.jz@bp.renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/display/renesas,rzg2l-du.yaml | 32 +++++++++++++++++--
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
index 08e5b9478051..95e3d5e74b87 100644
--- a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
+++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
@@ -18,6 +18,7 @@ properties:
compatible:
oneOf:
- enum:
+ - renesas,r9a07g043u-du # RZ/G2UL
- renesas,r9a07g044-du # RZ/G2{L,LC}
- items:
- enum:
@@ -60,9 +61,6 @@ properties:
$ref: /schemas/graph.yaml#/properties/port
unevaluatedProperties: false
- required:
- - port@0
-
unevaluatedProperties: false
renesas,vsps:
@@ -88,6 +86,34 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a07g043u-du
+ then:
+ properties:
+ ports:
+ properties:
+ port@0:
+ description: DPI
+
+ required:
+ - port@0
+ else:
+ properties:
+ ports:
+ properties:
+ port@0:
+ description: DSI
+ port@1:
+ description: DPI
+
+ required:
+ - port@0
+ - port@1
+
examples:
# RZ/G2L DU
- |
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 11/16] drm: renesas: Move RZ/G2L MIPI DSI driver to rz-du
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (9 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 10/16] dt-bindings: display: renesas,rzg2l-du: Document RZ/G2UL DU bindings Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 12/16] drm: renesas: rz-du: Add RZ/G2UL DU Support Biju Das
` (6 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 1b5dfd1881dbe303536d4167500b94549ff2f6a7 upstream.
All the RZ/G2L DU specific components are located under the rz-du folder,
so it makes sense to move the RZ/G2L MIPI DSI driver there instead of
keeping it in the rcar-du folder. This change improves the organization
and modularity of the driver configuration by grouping related settings together.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240625123244.200533-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/gpu/drm/renesas/rcar-du/Kconfig | 8 --------
drivers/gpu/drm/renesas/rcar-du/Makefile | 2 --
drivers/gpu/drm/renesas/rz-du/Kconfig | 8 ++++++++
drivers/gpu/drm/renesas/rz-du/Makefile | 2 ++
.../gpu/drm/renesas/{rcar-du => rz-du}/rzg2l_mipi_dsi.c | 0
.../drm/renesas/{rcar-du => rz-du}/rzg2l_mipi_dsi_regs.h | 0
6 files changed, 10 insertions(+), 10 deletions(-)
rename drivers/gpu/drm/renesas/{rcar-du => rz-du}/rzg2l_mipi_dsi.c (100%)
rename drivers/gpu/drm/renesas/{rcar-du => rz-du}/rzg2l_mipi_dsi_regs.h (100%)
diff --git a/drivers/gpu/drm/renesas/rcar-du/Kconfig b/drivers/gpu/drm/renesas/rcar-du/Kconfig
index b2bddbeca878..a5518e90d689 100644
--- a/drivers/gpu/drm/renesas/rcar-du/Kconfig
+++ b/drivers/gpu/drm/renesas/rcar-du/Kconfig
@@ -54,14 +54,6 @@ config DRM_RCAR_MIPI_DSI
depends on DRM_RCAR_USE_MIPI_DSI
select DRM_MIPI_DSI
-config DRM_RZG2L_MIPI_DSI
- tristate "RZ/G2L MIPI DSI Encoder Support"
- depends on DRM && DRM_BRIDGE && OF
- depends on ARCH_RENESAS || COMPILE_TEST
- select DRM_MIPI_DSI
- help
- Enable support for the RZ/G2L Display Unit embedded MIPI DSI encoders.
-
config DRM_RCAR_VSP
bool "R-Car DU VSP Compositor Support" if ARM
default y if ARM64
diff --git a/drivers/gpu/drm/renesas/rcar-du/Makefile b/drivers/gpu/drm/renesas/rcar-du/Makefile
index b8f2c82651d9..6f132325c8b7 100644
--- a/drivers/gpu/drm/renesas/rcar-du/Makefile
+++ b/drivers/gpu/drm/renesas/rcar-du/Makefile
@@ -14,5 +14,3 @@ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du-drm.o
obj-$(CONFIG_DRM_RCAR_DW_HDMI) += rcar_dw_hdmi.o
obj-$(CONFIG_DRM_RCAR_LVDS) += rcar_lvds.o
obj-$(CONFIG_DRM_RCAR_MIPI_DSI) += rcar_mipi_dsi.o
-
-obj-$(CONFIG_DRM_RZG2L_MIPI_DSI) += rzg2l_mipi_dsi.o
diff --git a/drivers/gpu/drm/renesas/rz-du/Kconfig b/drivers/gpu/drm/renesas/rz-du/Kconfig
index 5f0db2c5fee6..8ec14271ebba 100644
--- a/drivers/gpu/drm/renesas/rz-du/Kconfig
+++ b/drivers/gpu/drm/renesas/rz-du/Kconfig
@@ -10,3 +10,11 @@ config DRM_RZG2L_DU
help
Choose this option if you have an RZ/G2L alike chipset.
If M is selected the module will be called rzg2l-du-drm.
+
+config DRM_RZG2L_MIPI_DSI
+ tristate "RZ/G2L MIPI DSI Encoder Support"
+ depends on DRM && DRM_BRIDGE && OF
+ depends on ARCH_RENESAS || COMPILE_TEST
+ select DRM_MIPI_DSI
+ help
+ Enable support for the RZ/G2L Display Unit embedded MIPI DSI encoders.
diff --git a/drivers/gpu/drm/renesas/rz-du/Makefile b/drivers/gpu/drm/renesas/rz-du/Makefile
index 663b82a2577f..2987900ea6b6 100644
--- a/drivers/gpu/drm/renesas/rz-du/Makefile
+++ b/drivers/gpu/drm/renesas/rz-du/Makefile
@@ -6,3 +6,5 @@ rzg2l-du-drm-y := rzg2l_du_crtc.o \
rzg2l-du-drm-$(CONFIG_VIDEO_RENESAS_VSP1) += rzg2l_du_vsp.o
obj-$(CONFIG_DRM_RZG2L_DU) += rzg2l-du-drm.o
+
+obj-$(CONFIG_DRM_RZG2L_MIPI_DSI) += rzg2l_mipi_dsi.o
diff --git a/drivers/gpu/drm/renesas/rcar-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
similarity index 100%
rename from drivers/gpu/drm/renesas/rcar-du/rzg2l_mipi_dsi.c
rename to drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
diff --git a/drivers/gpu/drm/renesas/rcar-du/rzg2l_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi_regs.h
similarity index 100%
rename from drivers/gpu/drm/renesas/rcar-du/rzg2l_mipi_dsi_regs.h
rename to drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi_regs.h
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 12/16] drm: renesas: rz-du: Add RZ/G2UL DU Support
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (10 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 11/16] drm: renesas: Move RZ/G2L MIPI DSI driver to rz-du Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 13/16] arm64: dts: renesas: r9a07g043u: Add FCPVD node Biju Das
` (5 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit b330f148017251810fc1f0c297f51b3039b796e0 upstream.
The LCD controller is composed of Frame Compression Processor (FCPVD),
Video Signal Processor (VSPD), and Display Unit (DU).
It has DPI interface and supports a maximum resolution of WXGA along
with 2 RPFs to support the blending of two picture layers and raster
operations (ROPs).
The DU module is connected to VSPD. Add RZ/G2UL DU support.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240822162320.5084-3-biju.das.jz@bp.renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c | 8 +++++++-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c | 11 +++++++++++
drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c | 3 ++-
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c
index 6e7aac6219be..c4c1474d487e 100644
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c
@@ -28,6 +28,7 @@
#include "rzg2l_du_vsp.h"
#define DU_MCR0 0x00
+#define DU_MCR0_DPI_OE BIT(0)
#define DU_MCR0_DI_EN BIT(8)
#define DU_DITR0 0x10
@@ -216,9 +217,14 @@ static void rzg2l_du_crtc_put(struct rzg2l_du_crtc *rcrtc)
static void rzg2l_du_start_stop(struct rzg2l_du_crtc *rcrtc, bool start)
{
+ struct rzg2l_du_crtc_state *rstate = to_rzg2l_crtc_state(rcrtc->crtc.state);
struct rzg2l_du_device *rcdu = rcrtc->dev;
+ u32 val = DU_MCR0_DI_EN;
- writel(start ? DU_MCR0_DI_EN : 0, rcdu->mmio + DU_MCR0);
+ if (rstate->outputs & BIT(RZG2L_DU_OUTPUT_DPAD0))
+ val |= DU_MCR0_DPI_OE;
+
+ writel(start ? val : 0, rcdu->mmio + DU_MCR0);
}
static void rzg2l_du_crtc_start(struct rzg2l_du_crtc *rcrtc)
diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
index a0a05a949e4e..6312effe8719 100644
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
@@ -25,6 +25,16 @@
* Device Information
*/
+static const struct rzg2l_du_device_info rzg2l_du_r9a07g043u_info = {
+ .channels_mask = BIT(0),
+ .routes = {
+ [RZG2L_DU_OUTPUT_DPAD0] = {
+ .possible_outputs = BIT(0),
+ .port = 0,
+ },
+ },
+};
+
static const struct rzg2l_du_device_info rzg2l_du_r9a07g044_info = {
.channels_mask = BIT(0),
.routes = {
@@ -40,6 +50,7 @@ static const struct rzg2l_du_device_info rzg2l_du_r9a07g044_info = {
};
static const struct of_device_id rzg2l_du_of_table[] = {
+ { .compatible = "renesas,r9a07g043u-du", .data = &rzg2l_du_r9a07g043u_info },
{ .compatible = "renesas,r9a07g044-du", .data = &rzg2l_du_r9a07g044_info },
{ /* sentinel */ }
};
diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c
index 07b312b6f81e..b99217b4e05d 100644
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c
@@ -183,7 +183,8 @@ static int rzg2l_du_encoders_init(struct rzg2l_du_device *rcdu)
/* Find the output route corresponding to the port number. */
for (i = 0; i < RZG2L_DU_OUTPUT_MAX; ++i) {
- if (rcdu->info->routes[i].port == ep.port) {
+ if (rcdu->info->routes[i].possible_outputs &&
+ rcdu->info->routes[i].port == ep.port) {
output = i;
break;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 13/16] arm64: dts: renesas: r9a07g043u: Add FCPVD node
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (11 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 12/16] drm: renesas: rz-du: Add RZ/G2UL DU Support Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 14/16] arm64: dts: renesas: r9a07g043u: Add VSPD node Biju Das
` (4 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit a94a244a5b1a2040611aaaa17fd23dd908bc01ac upstream.
Add FCPVD node to RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240805131709.101679-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index 2139df5fe7b6..2af4583fcd07 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -128,6 +128,17 @@ csi2cru: endpoint@0 {
};
};
+ fcpvd: fcp@10880000 {
+ compatible = "renesas,r9a07g043u-fcpvd", "renesas,fcpv";
+ reg = <0 0x10880000 0 0x10000>;
+ clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G043_LCDC_RESET_N>;
+ };
+
irqc: interrupt-controller@110a0000 {
compatible = "renesas,r9a07g043u-irqc",
"renesas,rzg2l-irqc";
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 14/16] arm64: dts: renesas: r9a07g043u: Add VSPD node
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (12 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 13/16] arm64: dts: renesas: r9a07g043u: Add FCPVD node Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 15/16] arm64: dts: renesas: r9a07g043u: Add DU node Biju Das
` (3 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit 6bfd974d03a433e7fa9d5444f89851e4e4eb9779 upstream.
Add VSPD node to RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240805131709.101679-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index 2af4583fcd07..b24ca968afcc 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -128,6 +128,19 @@ csi2cru: endpoint@0 {
};
};
+ vspd: vsp@10870000 {
+ compatible = "renesas,r9a07g043u-vsp2", "renesas,r9a07g044-vsp2";
+ reg = <0 0x10870000 0 0x10000>;
+ interrupts = <SOC_PERIPHERAL_IRQ(149) IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G043_LCDC_RESET_N>;
+ renesas,fcp = <&fcpvd>;
+ };
+
fcpvd: fcp@10880000 {
compatible = "renesas,r9a07g043u-fcpvd", "renesas,fcpv";
reg = <0 0x10880000 0 0x10000>;
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 15/16] arm64: dts: renesas: r9a07g043u: Add DU node
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (13 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 14/16] arm64: dts: renesas: r9a07g043u: Add VSPD node Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 16/16] arm64: dts: renesas: r9a07g043u11-smarc: Enable DU Biju Das
` (2 subsequent siblings)
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit e895a806608a1f95067d27ae3870c9b4c5a236ee upstream.
Add DU node to RZ/G2UL SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822162320.5084-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 25 +++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index b24ca968afcc..0c81f37025cb 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -152,6 +152,31 @@ fcpvd: fcp@10880000 {
resets = <&cpg R9A07G043_LCDC_RESET_N>;
};
+ du: display@10890000 {
+ compatible = "renesas,r9a07g043u-du";
+ reg = <0 0x10890000 0 0x10000>;
+ interrupts = <SOC_PERIPHERAL_IRQ(152) IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G043_LCDC_RESET_N>;
+ renesas,vsps = <&vspd 0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ };
+ };
+
irqc: interrupt-controller@110a0000 {
compatible = "renesas,r9a07g043u-irqc",
"renesas,rzg2l-irqc";
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 6.1.y-cip 16/16] arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (14 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 15/16] arm64: dts: renesas: r9a07g043u: Add DU node Biju Das
@ 2024-10-02 17:04 ` Biju Das
2024-10-03 10:36 ` [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Pavel Machek
2024-10-04 15:48 ` Pavel Machek
17 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-02 17:04 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
commit cc49fcd0bc2db23489a87f6fa17119a76b70ec6b upstream.
Enable the Display Unit and link with the HDMI add-on board connected
to the parallel connector on the RZ/G2UL SMARC EVK by using a Device
Tree overlay.
DT overlay changes are different compared to mainline. So ported the
changes without using overlay.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826101648.176647-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[Biju: Dropped r9a07g043u11-smarc-du-adv7513.dtso file ]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 50 ++++++++++++
.../boot/dts/renesas/rz-smarc-du-adv7513.dtsi | 76 +++++++++++++++++++
2 files changed, 126 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
index eab24a811370..73ead513fadc 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
@@ -38,6 +38,9 @@
#define OV5645_PARENT_I2C i2c0
#include "rz-smarc-cru-csi-ov5645.dtsi"
+#define ADV7513_PARENT_I2C i2c1
+#include "rz-smarc-du-adv7513.dtsi"
+
/ {
model = "Renesas SMARC EVK based on r9a07g043u11";
compatible = "renesas,smarc-evk", "renesas,r9a07g043u11", "renesas,r9a07g043";
@@ -47,3 +50,50 @@ &ov5645 {
enable-gpios = <&pinctrl RZG2L_GPIO(4, 4) GPIO_ACTIVE_HIGH>;
reset-gpios = <&pinctrl RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>;
};
+
+&pinctrl {
+ du_pins: du {
+ data {
+ pinmux = <RZG2L_PORT_PINMUX(11, 2, 6)>,
+ <RZG2L_PORT_PINMUX(13, 1, 6)>,
+ <RZG2L_PORT_PINMUX(13, 0, 6)>,
+ <RZG2L_PORT_PINMUX(13, 4, 6)>,
+ <RZG2L_PORT_PINMUX(13, 3, 6)>,
+ <RZG2L_PORT_PINMUX(12, 1, 6)>,
+ <RZG2L_PORT_PINMUX(13, 2, 6)>,
+ <RZG2L_PORT_PINMUX(14, 0, 6)>,
+ <RZG2L_PORT_PINMUX(14, 2, 6)>,
+ <RZG2L_PORT_PINMUX(14, 1, 6)>,
+ <RZG2L_PORT_PINMUX(16, 0, 6)>,
+ <RZG2L_PORT_PINMUX(15, 0, 6)>,
+ <RZG2L_PORT_PINMUX(16, 1, 6)>,
+ <RZG2L_PORT_PINMUX(15, 1, 6)>,
+ <RZG2L_PORT_PINMUX(15, 3, 6)>,
+ <RZG2L_PORT_PINMUX(18, 0, 6)>,
+ <RZG2L_PORT_PINMUX(15, 2, 6)>,
+ <RZG2L_PORT_PINMUX(17, 0, 6)>,
+ <RZG2L_PORT_PINMUX(17, 2, 6)>,
+ <RZG2L_PORT_PINMUX(17, 1, 6)>,
+ <RZG2L_PORT_PINMUX(18, 1, 6)>,
+ <RZG2L_PORT_PINMUX(18, 2, 6)>,
+ <RZG2L_PORT_PINMUX(17, 3, 6)>,
+ <RZG2L_PORT_PINMUX(18, 3, 6)>;
+ drive-strength = <2>;
+ };
+
+ sync {
+ pinmux = <RZG2L_PORT_PINMUX(11, 0, 6)>, /* HSYNC */
+ <RZG2L_PORT_PINMUX(12, 0, 6)>; /* VSYNC */
+ drive-strength = <2>;
+ };
+
+ de {
+ pinmux = <RZG2L_PORT_PINMUX(11, 1, 6)>; /* DE */
+ drive-strength = <2>;
+ };
+
+ clk {
+ pinmux = <RZG2L_PORT_PINMUX(11, 3, 6)>; /* CLK */
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi b/arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi
new file mode 100644
index 000000000000..36707576030d
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Common Device Tree for the RZ/G2UL SMARC EVK (and alike EVKs) with
+ * ADV7513 transmitter connected to DU enabled.
+ *
+ * Copyright (C) 2024 Renesas Electronics Corp.
+ */
+
+&{/} {
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_out: endpoint {
+ remote-endpoint = <&adv7513_out>;
+ };
+ };
+ };
+};
+
+&du {
+ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ ports {
+ port@0 {
+ du_out_rgb: endpoint {
+ remote-endpoint = <&adv7513_in>;
+ };
+ };
+ };
+};
+
+&ADV7513_PARENT_I2C {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adv7513: adv7513@39 {
+ compatible = "adi,adv7513";
+ reg = <0x39>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+
+ avdd-supply = <®_1p8v>;
+ dvdd-supply = <®_1p8v>;
+ pvdd-supply = <®_1p8v>;
+ dvdd-3v-supply = <®_3p3v>;
+ bgvdd-supply = <®_1p8v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adv7513_in: endpoint {
+ remote-endpoint = <&du_out_rgb>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ adv7513_out: endpoint {
+ remote-endpoint = <&hdmi_con_out>;
+ };
+ };
+ };
+ };
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* RE: [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe()
2024-10-02 17:03 ` [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe() Biju Das
@ 2024-10-03 5:28 ` nobuhiro1.iwamatsu
2024-10-03 6:15 ` Biju Das
0 siblings, 1 reply; 23+ messages in thread
From: nobuhiro1.iwamatsu @ 2024-10-03 5:28 UTC (permalink / raw)
To: biju.das.jz, cip-dev, pavel; +Cc: prabhakar.mahadev-lad.rj
Hi Biju Das,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Thursday, October 3, 2024 2:04 AM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○ＤＩＴＣ□
> ＤＩＴ○ＯＳＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe()
>
> commit f73f63b24491fa43641daf3b6162d2a451bd8481 upstream.
>
> Replace dev_err()->dev_err_probe() to simpilfy probe helper functions.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Link:
> https://lore.kernel.org/20240728090421.7136-1-biju.das.jz@bp.renesas.com
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> drivers/pinctrl/renesas/pinctrl-rzg2l.c | 37 +++++++++----------------
> 1 file changed, 13 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> index 6f49da4bd327..0cae3e75b26a 100644
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -2200,16 +2200,13 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl
> *pctrl)
> return -EPROBE_DEFER;
>
> ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
> &of_args);
> - if (ret) {
> - dev_err(pctrl->dev, "Unable to parse gpio-ranges\n");
> - return ret;
> - }
> + if (ret)
> + return dev_err_probe(pctrl->dev, ret, "Unable to parse
> +gpio-ranges\n");
>
> if (of_args.args[0] != 0 || of_args.args[1] != 0 ||
> - of_args.args[2] != pctrl->data->n_port_pins) {
> - dev_err(pctrl->dev, "gpio-ranges does not match selected
> SOC\n");
> - return -EINVAL;
> - }
> + of_args.args[2] != pctrl->data->n_port_pins)
> + return dev_err_probe(pctrl->dev, -EINVAL,
> + "gpio-ranges does not match selected
> SOC\n");
>
> chip->names = pctrl->data->port_pins;
> chip->request = rzg2l_gpio_request;
> @@ -2241,10 +2238,8 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl
> *pctrl)
> pctrl->gpio_range.name = chip->label;
> pctrl->gpio_range.gc = chip;
> ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
> - if (ret) {
> - dev_err(pctrl->dev, "failed to add GPIO controller\n");
> - return ret;
> - }
> + if (ret)
> + return dev_err_probe(pctrl->dev, ret, "failed to add GPIO
> +controller\n");
>
> dev_dbg(pctrl->dev, "Registered gpio controller\n");
>
> @@ -2325,22 +2320,16 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl
> *pctrl)
>
> ret = devm_pinctrl_register_and_init(pctrl->dev, &pctrl->desc, pctrl,
> &pctrl->pctl);
> - if (ret) {
> - dev_err(pctrl->dev, "pinctrl registration failed\n");
> - return ret;
> - }
> + if (ret)
> + return dev_err_probe(pctrl->dev, ret, "pinctrl registration
> +failed\n");
>
> ret = pinctrl_enable(pctrl->pctl);
> - if (ret) {
> - dev_err(pctrl->dev, "pinctrl enable failed\n");
> - return ret;
> - }
> + if (ret)
> + dev_err_probe(pctrl->dev, ret, "pinctrl enable failed\n");
return dev_err_probe ?
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support
2024-10-02 17:03 ` [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support Biju Das
@ 2024-10-03 5:53 ` nobuhiro1.iwamatsu
2024-10-03 6:33 ` Biju Das
0 siblings, 1 reply; 23+ messages in thread
From: nobuhiro1.iwamatsu @ 2024-10-03 5:53 UTC (permalink / raw)
To: biju.das.jz, cip-dev, pavel; +Cc: prabhakar.mahadev-lad.rj
Hi Biju Das,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Thursday, October 3, 2024 2:04 AM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○ＤＩＴＣ□
> ＤＩＴ○ＯＳＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support
>
> commit 4f8cd05a43058b165b83f12f656e60415d2ff5be upstream.
>
> Add full duplex support, to support simultaneous playback/record on the same
> ssi channel.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Link:
> https://patch.msgid.link/20240715092322.119879-1-biju.das.jz@bp.renesas.
> com
> Signed-off-by: Mark Brown <broonie@kernel.org>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> sound/soc/sh/rz-ssi.c | 257
> ++++++++++++++++++++++++++++++------------
> 1 file changed, 182 insertions(+), 75 deletions(-)
>
> diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c index
> d502aa55c5a8..6972b70baf73 100644
> --- a/sound/soc/sh/rz-ssi.c
> +++ b/sound/soc/sh/rz-ssi.c
> @@ -53,6 +53,7 @@
> #define SSIFCR_RIE BIT(2)
> #define SSIFCR_TFRST BIT(1)
> #define SSIFCR_RFRST BIT(0)
> +#define SSIFCR_FIFO_RST (SSIFCR_TFRST | SSIFCR_RFRST)
>
> #define SSIFSR_TDC_MASK 0x3f
> #define SSIFSR_TDC_SHIFT 24
> @@ -131,6 +132,14 @@ struct rz_ssi_priv {
> bool lrckp_fsync_fall; /* LR clock polarity (SSICR.LRCKP) */
> bool bckp_rise; /* Bit clock polarity (SSICR.BCKP) */
> bool dma_rt;
> +
> + /* Full duplex communication support */
> + struct {
> + unsigned int rate;
> + unsigned int channels;
> + unsigned int sample_width;
> + unsigned int sample_bits;
> + } hw_params_cache;
> };
>
> static void rz_ssi_dma_complete(void *data); @@ -209,6 +218,11 @@ static
> bool rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
> return ret;
> }
>
> +static inline bool rz_ssi_is_stream_running(struct rz_ssi_stream *strm)
> +{
> + return strm->substream && strm->running; }
> +
> static void rz_ssi_stream_init(struct rz_ssi_stream *strm,
> struct snd_pcm_substream *substream)
> { @@ -304,13 +318,53 @@ static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi,
> unsigned int rate,
> return 0;
> }
>
> +static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) {
> + int timeout;
> +
> + /* Disable irqs */
> + rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
> + SSICR_RUIEN | SSICR_ROIEN, 0);
> + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_TIE | SSIFCR_RIE, 0);
> +
> + /* Clear all error flags */
> + rz_ssi_reg_mask_setl(ssi, SSISR,
> + (SSISR_TOIRQ | SSISR_TUIRQ | SSISR_ROIRQ |
> + SSISR_RUIRQ), 0);
> +
> + /* Wait for idle */
> + timeout = 100;
> + while (--timeout) {
> + if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ)
> + break;
> + udelay(1);
> + }
> +
> + if (!timeout)
> + dev_info(ssi->dev, "timeout waiting for SSI idle\n");
> +
There is no check for timeout, is there a problem?
> + /* Hold FIFOs in reset */
> + rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
> + SSIFCR_TFRST | SSIFCR_RFRST);
We can use SSIFCR_FIFO_RST instead of SSIFCR_TFRST | SSIFCR_RFRST.
> +}
> +
> static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) {
> bool is_play = rz_ssi_stream_is_play(ssi, strm->substream);
> + bool is_full_duplex;
> u32 ssicr, ssifcr;
>
> + is_full_duplex = rz_ssi_is_stream_running(&ssi->playback) ||
> + rz_ssi_is_stream_running(&ssi->capture);
> ssicr = rz_ssi_reg_readl(ssi, SSICR);
> - ssifcr = rz_ssi_reg_readl(ssi, SSIFCR) & ~0xF;
> + ssifcr = rz_ssi_reg_readl(ssi, SSIFCR);
> + if (!is_full_duplex) {
> + ssifcr &= ~0xF;
> + } else {
> + rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN,
> 0);
> + rz_ssi_set_idle(ssi);
> + ssifcr &= ~SSIFCR_FIFO_RST;
> + }
>
> /* FIFO interrupt thresholds */
> if (rz_ssi_is_dma_enabled(ssi))
> @@ -323,10 +377,14 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct
> rz_ssi_stream *strm)
> /* enable IRQ */
> if (is_play) {
> ssicr |= SSICR_TUIEN | SSICR_TOIEN;
> - ssifcr |= SSIFCR_TIE | SSIFCR_RFRST;
> + ssifcr |= SSIFCR_TIE;
> + if (!is_full_duplex)
> + ssifcr |= SSIFCR_RFRST;
> } else {
> ssicr |= SSICR_RUIEN | SSICR_ROIEN;
> - ssifcr |= SSIFCR_RIE | SSIFCR_TFRST;
> + ssifcr |= SSIFCR_RIE;
> + if (!is_full_duplex)
> + ssifcr |= SSIFCR_TFRST;
> }
>
> rz_ssi_reg_writel(ssi, SSICR, ssicr);
> @@ -338,7 +396,11 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct
> rz_ssi_stream *strm)
> SSISR_RUIRQ), 0);
>
> strm->running = 1;
> - ssicr |= is_play ? SSICR_TEN : SSICR_REN;
> + if (is_full_duplex)
> + ssicr |= SSICR_TEN | SSICR_REN;
> + else
> + ssicr |= is_play ? SSICR_TEN : SSICR_REN;
> +
> rz_ssi_reg_writel(ssi, SSICR, ssicr);
>
> return 0;
> @@ -346,10 +408,12 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct
> rz_ssi_stream *strm)
>
> static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) {
> - int timeout;
> -
> strm->running = 0;
>
> + if (rz_ssi_is_stream_running(&ssi->playback) ||
> + rz_ssi_is_stream_running(&ssi->capture))
> + return 0;
> +
> /* Disable TX/RX */
> rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0);
>
> @@ -357,30 +421,7 @@ static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct
> rz_ssi_stream *strm)
> if (rz_ssi_is_dma_enabled(ssi))
> dmaengine_terminate_async(strm->dma_ch);
>
> - /* Disable irqs */
> - rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
> - SSICR_RUIEN | SSICR_ROIEN, 0);
> - rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_TIE | SSIFCR_RIE, 0);
> -
> - /* Clear all error flags */
> - rz_ssi_reg_mask_setl(ssi, SSISR,
> - (SSISR_TOIRQ | SSISR_TUIRQ | SSISR_ROIRQ |
> - SSISR_RUIRQ), 0);
> -
> - /* Wait for idle */
> - timeout = 100;
> - while (--timeout) {
> - if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ)
> - break;
> - udelay(1);
> - }
> -
> - if (!timeout)
> - dev_info(ssi->dev, "timeout waiting for SSI idle\n");
> -
> - /* Hold FIFOs in reset */
> - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
> - SSIFCR_TFRST | SSIFCR_RFRST);
> + rz_ssi_set_idle(ssi);
>
> return 0;
> }
> @@ -513,66 +554,90 @@ static int rz_ssi_pio_send(struct rz_ssi_priv *ssi,
> struct rz_ssi_stream *strm)
>
> static irqreturn_t rz_ssi_interrupt(int irq, void *data) {
> - struct rz_ssi_stream *strm = NULL;
> + struct rz_ssi_stream *strm_playback = NULL;
> + struct rz_ssi_stream *strm_capture = NULL;
> struct rz_ssi_priv *ssi = data;
> u32 ssisr = rz_ssi_reg_readl(ssi, SSISR);
>
> if (ssi->playback.substream)
> - strm = &ssi->playback;
> - else if (ssi->capture.substream)
> - strm = &ssi->capture;
> - else
> + strm_playback = &ssi->playback;
> + if (ssi->capture.substream)
> + strm_capture = &ssi->capture;
> +
> + if (!strm_playback && !strm_capture)
> return IRQ_HANDLED; /* Left over TX/RX interrupt */
>
> if (irq == ssi->irq_int) { /* error or idle */
> - if (ssisr & SSISR_TUIRQ)
> - strm->uerr_num++;
> - if (ssisr & SSISR_TOIRQ)
> - strm->oerr_num++;
> - if (ssisr & SSISR_RUIRQ)
> - strm->uerr_num++;
> - if (ssisr & SSISR_ROIRQ)
> - strm->oerr_num++;
> -
> - if (ssisr & (SSISR_TUIRQ | SSISR_TOIRQ | SSISR_RUIRQ |
> - SSISR_ROIRQ)) {
> - /* Error handling */
> - /* You must reset (stop/restart) after each interrupt */
> - rz_ssi_stop(ssi, strm);
> -
> - /* Clear all flags */
> - rz_ssi_reg_mask_setl(ssi, SSISR, SSISR_TOIRQ |
> - SSISR_TUIRQ | SSISR_ROIRQ |
> - SSISR_RUIRQ, 0);
> -
> - /* Add/remove more data */
> - strm->transfer(ssi, strm);
> -
> - /* Resume */
> - rz_ssi_start(ssi, strm);
> + bool is_stopped = false;
> + int i, count;
> +
> + if (rz_ssi_is_dma_enabled(ssi))
> + count = 4;
> + else
> + count = 1;
> +
> + if (ssisr & (SSISR_RUIRQ | SSISR_ROIRQ | SSISR_TUIRQ |
> SSISR_TOIRQ))
> + is_stopped = true;
> +
> + if (ssi->capture.substream && is_stopped) {
> + if (ssisr & SSISR_RUIRQ)
> + strm_capture->uerr_num++;
> + if (ssisr & SSISR_ROIRQ)
> + strm_capture->oerr_num++;
> +
> + rz_ssi_stop(ssi, strm_capture);
> }
> +
> + if (ssi->playback.substream && is_stopped) {
> + if (ssisr & SSISR_TUIRQ)
> + strm_playback->uerr_num++;
> + if (ssisr & SSISR_TOIRQ)
> + strm_playback->oerr_num++;
> +
> + rz_ssi_stop(ssi, strm_playback);
> + }
> +
> + /* Clear all flags */
> + rz_ssi_reg_mask_setl(ssi, SSISR, SSISR_TOIRQ |
> SSISR_TUIRQ |
> + SSISR_ROIRQ | SSISR_RUIRQ, 0);
> +
> + /* Add/remove more data */
> + if (ssi->capture.substream && is_stopped) {
> + for (i = 0; i < count; i++)
> + strm_capture->transfer(ssi, strm_capture);
> + }
> +
> + if (ssi->playback.substream && is_stopped) {
> + for (i = 0; i < count; i++)
> + strm_playback->transfer(ssi,
> strm_playback);
> + }
> +
> + /* Resume */
> + if (ssi->playback.substream && is_stopped)
> + rz_ssi_start(ssi, &ssi->playback);
> + if (ssi->capture.substream && is_stopped)
> + rz_ssi_start(ssi, &ssi->capture);
> }
>
> - if (!strm->running)
> + if (!rz_ssi_is_stream_running(&ssi->playback) &&
> + !rz_ssi_is_stream_running(&ssi->capture))
> return IRQ_HANDLED;
>
> /* tx data empty */
> - if (irq == ssi->irq_tx)
> - strm->transfer(ssi, &ssi->playback);
> + if (irq == ssi->irq_tx && rz_ssi_is_stream_running(&ssi->playback))
> + strm_playback->transfer(ssi, &ssi->playback);
>
> /* rx data full */
> - if (irq == ssi->irq_rx) {
> - strm->transfer(ssi, &ssi->capture);
> + if (irq == ssi->irq_rx && rz_ssi_is_stream_running(&ssi->capture)) {
> + strm_capture->transfer(ssi, &ssi->capture);
> rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
> }
>
> if (irq == ssi->irq_rt) {
> - struct snd_pcm_substream *substream = strm->substream;
> -
> - if (rz_ssi_stream_is_play(ssi, substream)) {
> - strm->transfer(ssi, &ssi->playback);
> + if (ssi->playback.substream) {
> + strm_playback->transfer(ssi, &ssi->playback);
> } else {
> - strm->transfer(ssi, &ssi->capture);
> + strm_capture->transfer(ssi, &ssi->capture);
> rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
> }
> }
> @@ -732,9 +797,12 @@ static int rz_ssi_dai_trigger(struct
> snd_pcm_substream *substream, int cmd,
> switch (cmd) {
> case SNDRV_PCM_TRIGGER_START:
> /* Soft Reset */
> - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST);
> - rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0);
> - udelay(5);
> + if (!rz_ssi_is_stream_running(&ssi->playback) &&
> + !rz_ssi_is_stream_running(&ssi->capture)) {
> + rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
> SSIFCR_SSIRST);
> + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST,
> 0);
> + udelay(5);
> + }
>
> rz_ssi_stream_init(strm, substream);
>
> @@ -825,14 +893,41 @@ static int rz_ssi_dai_set_fmt(struct snd_soc_dai *dai,
> unsigned int fmt)
> return 0;
> }
>
> +static bool rz_ssi_is_valid_hw_params(struct rz_ssi_priv *ssi, unsigned int
> rate,
> + unsigned int channels,
> + unsigned int sample_width,
> + unsigned int sample_bits)
> +{
> + if (ssi->hw_params_cache.rate != rate ||
> + ssi->hw_params_cache.channels != channels ||
> + ssi->hw_params_cache.sample_width != sample_width ||
> + ssi->hw_params_cache.sample_bits != sample_bits)
> + return false;
> +
> + return true;
> +}
> +
> +static void rz_ssi_cache_hw_params(struct rz_ssi_priv *ssi, unsigned int
> rate,
> + unsigned int channels,
> + unsigned int sample_width,
> + unsigned int sample_bits)
> +{
> + ssi->hw_params_cache.rate = rate;
> + ssi->hw_params_cache.channels = channels;
> + ssi->hw_params_cache.sample_width = sample_width;
> + ssi->hw_params_cache.sample_bits = sample_bits; }
> +
> static int rz_ssi_dai_hw_params(struct snd_pcm_substream *substream,
> struct snd_pcm_hw_params *params,
> struct snd_soc_dai *dai)
> {
> struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai);
> + struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream);
> unsigned int sample_bits = hw_param_interval(params,
>
> SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
> unsigned int channels = params_channels(params);
> + unsigned int rate = params_rate(params);
>
> if (sample_bits != 16) {
> dev_err(ssi->dev, "Unsupported sample width: %d\n", @@
> -846,8 +941,20 @@ static int rz_ssi_dai_hw_params(struct
> snd_pcm_substream *substream,
> return -EINVAL;
> }
>
> - return rz_ssi_clk_setup(ssi, params_rate(params),
> - params_channels(params));
> + if (rz_ssi_is_stream_running(&ssi->playback) ||
> + rz_ssi_is_stream_running(&ssi->capture)) {
> + if (rz_ssi_is_valid_hw_params(ssi, rate, channels,
> + strm->sample_width,
> sample_bits))
> + return 0;
> +
> + dev_err(ssi->dev, "Full duplex needs same HW params\n");
> + return -EINVAL;
> + }
> +
> + rz_ssi_cache_hw_params(ssi, rate, channels, strm->sample_width,
> + sample_bits);
> +
> + return rz_ssi_clk_setup(ssi, rate, channels);
> }
>
> static const struct snd_soc_dai_ops rz_ssi_dai_ops = {
> --
> 2.43.0
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe()
2024-10-03 5:28 ` nobuhiro1.iwamatsu
@ 2024-10-03 6:15 ` Biju Das
0 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-03 6:15 UTC (permalink / raw)
To: nobuhiro1.iwamatsu@toshiba.co.jp, cip-dev@lists.cip-project.org,
pavel@denx.de
Cc: Prabhakar Mahadev Lad
Hi Nobuhiro-San,
Thanks for the feedback.
> -----Original Message-----
> From: nobuhiro1.iwamatsu@toshiba.co.jp <nobuhiro1.iwamatsu@toshiba.co.jp>
> Subject: RE: [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe()
>
> Hi Biju Das,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Thursday, October 3, 2024 2:04 AM
> > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○ＤＩＴＣ□
> > ＤＩＴ○ＯＳＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> > <pavel@denx.de>
> > Cc: Biju Das <biju.das.jz@bp.renesas.com>; Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Subject: [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use
> > dev_err_probe()
> >
> > commit f73f63b24491fa43641daf3b6162d2a451bd8481 upstream.
> >
> > Replace dev_err()->dev_err_probe() to simpilfy probe helper functions.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Link:
> > https://lore.kernel.org/20240728090421.7136-1-biju.das.jz@bp.renesas.c
> > om
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 37
> > +++++++++----------------
> > 1 file changed, 13 insertions(+), 24 deletions(-)
> >
> > diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > index 6f49da4bd327..0cae3e75b26a 100644
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -2200,16 +2200,13 @@ static int rzg2l_gpio_register(struct
> > rzg2l_pinctrl
> > *pctrl)
> > return -EPROBE_DEFER;
> >
> > ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
> > &of_args);
> > - if (ret) {
> > - dev_err(pctrl->dev, "Unable to parse gpio-ranges\n");
> > - return ret;
> > - }
> > + if (ret)
> > + return dev_err_probe(pctrl->dev, ret, "Unable to parse
> > +gpio-ranges\n");
> >
> > if (of_args.args[0] != 0 || of_args.args[1] != 0 ||
> > - of_args.args[2] != pctrl->data->n_port_pins) {
> > - dev_err(pctrl->dev, "gpio-ranges does not match selected
> > SOC\n");
> > - return -EINVAL;
> > - }
> > + of_args.args[2] != pctrl->data->n_port_pins)
> > + return dev_err_probe(pctrl->dev, -EINVAL,
> > + "gpio-ranges does not match selected
> > SOC\n");
> >
> > chip->names = pctrl->data->port_pins;
> > chip->request = rzg2l_gpio_request;
> > @@ -2241,10 +2238,8 @@ static int rzg2l_gpio_register(struct
> > rzg2l_pinctrl
> > *pctrl)
> > pctrl->gpio_range.name = chip->label;
> > pctrl->gpio_range.gc = chip;
> > ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
> > - if (ret) {
> > - dev_err(pctrl->dev, "failed to add GPIO controller\n");
> > - return ret;
> > - }
> > + if (ret)
> > + return dev_err_probe(pctrl->dev, ret, "failed to add GPIO
> > +controller\n");
> >
> > dev_dbg(pctrl->dev, "Registered gpio controller\n");
> >
> > @@ -2325,22 +2320,16 @@ static int rzg2l_pinctrl_register(struct
> > rzg2l_pinctrl
> > *pctrl)
> >
> > ret = devm_pinctrl_register_and_init(pctrl->dev, &pctrl->desc, pctrl,
> > &pctrl->pctl);
> > - if (ret) {
> > - dev_err(pctrl->dev, "pinctrl registration failed\n");
> > - return ret;
> > - }
> > + if (ret)
> > + return dev_err_probe(pctrl->dev, ret, "pinctrl registration
> > +failed\n");
> >
> > ret = pinctrl_enable(pctrl->pctl);
> > - if (ret) {
> > - dev_err(pctrl->dev, "pinctrl enable failed\n");
> > - return ret;
> > - }
> > + if (ret)
> > + dev_err_probe(pctrl->dev, ret, "pinctrl enable failed\n");
>
> return dev_err_probe ?
Good catch. Please drop this patch. I will fix it in mainline and then backport.
Cheers,
Biju
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support
2024-10-03 5:53 ` nobuhiro1.iwamatsu
@ 2024-10-03 6:33 ` Biju Das
0 siblings, 0 replies; 23+ messages in thread
From: Biju Das @ 2024-10-03 6:33 UTC (permalink / raw)
To: nobuhiro1.iwamatsu@toshiba.co.jp, cip-dev@lists.cip-project.org,
pavel@denx.de
Cc: Prabhakar Mahadev Lad
H Nobuhiro-San,
> -----Original Message-----
> From: nobuhiro1.iwamatsu@toshiba.co.jp <nobuhiro1.iwamatsu@toshiba.co.jp>
> Subject: RE: [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support
>
> Hi Biju Das,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Thursday, October 3, 2024 2:04 AM
> > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○ＤＩＴＣ□
> > ＤＩＴ○ＯＳＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> > <pavel@denx.de>
> > Cc: Biju Das <biju.das.jz@bp.renesas.com>; Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Subject: [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex
> > support
> >
> > commit 4f8cd05a43058b165b83f12f656e60415d2ff5be upstream.
> >
> > Add full duplex support, to support simultaneous playback/record on
> > the same ssi channel.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Link:
> > https://patch.msgid.link/20240715092322.119879-1-biju.das.jz@bp.renesas.
> > com
> > Signed-off-by: Mark Brown <broonie@kernel.org>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > sound/soc/sh/rz-ssi.c | 257
> > ++++++++++++++++++++++++++++++------------
> > 1 file changed, 182 insertions(+), 75 deletions(-)
> >
> > diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c index
> > d502aa55c5a8..6972b70baf73 100644
> > --- a/sound/soc/sh/rz-ssi.c
> > +++ b/sound/soc/sh/rz-ssi.c
> > @@ -53,6 +53,7 @@
> > #define SSIFCR_RIE BIT(2)
> > #define SSIFCR_TFRST BIT(1)
> > #define SSIFCR_RFRST BIT(0)
> > +#define SSIFCR_FIFO_RST (SSIFCR_TFRST | SSIFCR_RFRST)
> >
> > #define SSIFSR_TDC_MASK 0x3f
> > #define SSIFSR_TDC_SHIFT 24
> > @@ -131,6 +132,14 @@ struct rz_ssi_priv {
> > bool lrckp_fsync_fall; /* LR clock polarity (SSICR.LRCKP) */
> > bool bckp_rise; /* Bit clock polarity (SSICR.BCKP) */
> > bool dma_rt;
> > +
> > + /* Full duplex communication support */
> > + struct {
> > + unsigned int rate;
> > + unsigned int channels;
> > + unsigned int sample_width;
> > + unsigned int sample_bits;
> > + } hw_params_cache;
> > };
> >
> > static void rz_ssi_dma_complete(void *data); @@ -209,6 +218,11 @@
> > static bool rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
> > return ret;
> > }
> >
> > +static inline bool rz_ssi_is_stream_running(struct rz_ssi_stream
> > +*strm) {
> > + return strm->substream && strm->running; }
> > +
> > static void rz_ssi_stream_init(struct rz_ssi_stream *strm,
> > struct snd_pcm_substream *substream) { @@ -304,13 +318,53
> > @@ static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int
> > rate,
> > return 0;
> > }
> >
> > +static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) {
> > + int timeout;
> > +
> > + /* Disable irqs */
> > + rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
> > + SSICR_RUIEN | SSICR_ROIEN, 0);
> > + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_TIE | SSIFCR_RIE, 0);
> > +
> > + /* Clear all error flags */
> > + rz_ssi_reg_mask_setl(ssi, SSISR,
> > + (SSISR_TOIRQ | SSISR_TUIRQ | SSISR_ROIRQ |
> > + SSISR_RUIRQ), 0);
> > +
> > + /* Wait for idle */
> > + timeout = 100;
> > + while (--timeout) {
> > + if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ)
> > + break;
> > + udelay(1);
> > + }
> > +
> > + if (!timeout)
> > + dev_info(ssi->dev, "timeout waiting for SSI idle\n");
> > +
>
> There is no check for timeout, is there a problem?
It is decrement operation. So !timeout is the check for timeout.
>
> > + /* Hold FIFOs in reset */
> > + rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
> > + SSIFCR_TFRST | SSIFCR_RFRST);
>
> We can use SSIFCR_FIFO_RST instead of SSIFCR_TFRST | SSIFCR_RFRST.
OK. Will fix this in mainline.
Cheers,
Biju
>
> > +}
> > +
> > static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) {
> > bool is_play = rz_ssi_stream_is_play(ssi, strm->substream);
> > + bool is_full_duplex;
> > u32 ssicr, ssifcr;
> >
> > + is_full_duplex = rz_ssi_is_stream_running(&ssi->playback) ||
> > + rz_ssi_is_stream_running(&ssi->capture);
> > ssicr = rz_ssi_reg_readl(ssi, SSICR);
> > - ssifcr = rz_ssi_reg_readl(ssi, SSIFCR) & ~0xF;
> > + ssifcr = rz_ssi_reg_readl(ssi, SSIFCR);
> > + if (!is_full_duplex) {
> > + ssifcr &= ~0xF;
> > + } else {
> > + rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN,
> > 0);
> > + rz_ssi_set_idle(ssi);
> > + ssifcr &= ~SSIFCR_FIFO_RST;
> > + }
> >
> > /* FIFO interrupt thresholds */
> > if (rz_ssi_is_dma_enabled(ssi))
> > @@ -323,10 +377,14 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi,
> > struct rz_ssi_stream *strm)
> > /* enable IRQ */
> > if (is_play) {
> > ssicr |= SSICR_TUIEN | SSICR_TOIEN;
> > - ssifcr |= SSIFCR_TIE | SSIFCR_RFRST;
> > + ssifcr |= SSIFCR_TIE;
> > + if (!is_full_duplex)
> > + ssifcr |= SSIFCR_RFRST;
> > } else {
> > ssicr |= SSICR_RUIEN | SSICR_ROIEN;
> > - ssifcr |= SSIFCR_RIE | SSIFCR_TFRST;
> > + ssifcr |= SSIFCR_RIE;
> > + if (!is_full_duplex)
> > + ssifcr |= SSIFCR_TFRST;
> > }
> >
> > rz_ssi_reg_writel(ssi, SSICR, ssicr); @@ -338,7 +396,11 @@ static
> > int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
> > SSISR_RUIRQ), 0);
> >
> > strm->running = 1;
> > - ssicr |= is_play ? SSICR_TEN : SSICR_REN;
> > + if (is_full_duplex)
> > + ssicr |= SSICR_TEN | SSICR_REN;
> > + else
> > + ssicr |= is_play ? SSICR_TEN : SSICR_REN;
> > +
> > rz_ssi_reg_writel(ssi, SSICR, ssicr);
> >
> > return 0;
> > @@ -346,10 +408,12 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi,
> > struct rz_ssi_stream *strm)
> >
> > static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) {
> > - int timeout;
> > -
> > strm->running = 0;
> >
> > + if (rz_ssi_is_stream_running(&ssi->playback) ||
> > + rz_ssi_is_stream_running(&ssi->capture))
> > + return 0;
> > +
> > /* Disable TX/RX */
> > rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0);
> >
> > @@ -357,30 +421,7 @@ static int rz_ssi_stop(struct rz_ssi_priv *ssi,
> > struct rz_ssi_stream *strm)
> > if (rz_ssi_is_dma_enabled(ssi))
> > dmaengine_terminate_async(strm->dma_ch);
> >
> > - /* Disable irqs */
> > - rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
> > - SSICR_RUIEN | SSICR_ROIEN, 0);
> > - rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_TIE | SSIFCR_RIE, 0);
> > -
> > - /* Clear all error flags */
> > - rz_ssi_reg_mask_setl(ssi, SSISR,
> > - (SSISR_TOIRQ | SSISR_TUIRQ | SSISR_ROIRQ |
> > - SSISR_RUIRQ), 0);
> > -
> > - /* Wait for idle */
> > - timeout = 100;
> > - while (--timeout) {
> > - if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ)
> > - break;
> > - udelay(1);
> > - }
> > -
> > - if (!timeout)
> > - dev_info(ssi->dev, "timeout waiting for SSI idle\n");
> > -
> > - /* Hold FIFOs in reset */
> > - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
> > - SSIFCR_TFRST | SSIFCR_RFRST);
> > + rz_ssi_set_idle(ssi);
> >
> > return 0;
> > }
> > @@ -513,66 +554,90 @@ static int rz_ssi_pio_send(struct rz_ssi_priv
> > *ssi, struct rz_ssi_stream *strm)
> >
> > static irqreturn_t rz_ssi_interrupt(int irq, void *data) {
> > - struct rz_ssi_stream *strm = NULL;
> > + struct rz_ssi_stream *strm_playback = NULL;
> > + struct rz_ssi_stream *strm_capture = NULL;
> > struct rz_ssi_priv *ssi = data;
> > u32 ssisr = rz_ssi_reg_readl(ssi, SSISR);
> >
> > if (ssi->playback.substream)
> > - strm = &ssi->playback;
> > - else if (ssi->capture.substream)
> > - strm = &ssi->capture;
> > - else
> > + strm_playback = &ssi->playback;
> > + if (ssi->capture.substream)
> > + strm_capture = &ssi->capture;
> > +
> > + if (!strm_playback && !strm_capture)
> > return IRQ_HANDLED; /* Left over TX/RX interrupt */
> >
> > if (irq == ssi->irq_int) { /* error or idle */
> > - if (ssisr & SSISR_TUIRQ)
> > - strm->uerr_num++;
> > - if (ssisr & SSISR_TOIRQ)
> > - strm->oerr_num++;
> > - if (ssisr & SSISR_RUIRQ)
> > - strm->uerr_num++;
> > - if (ssisr & SSISR_ROIRQ)
> > - strm->oerr_num++;
> > -
> > - if (ssisr & (SSISR_TUIRQ | SSISR_TOIRQ | SSISR_RUIRQ |
> > - SSISR_ROIRQ)) {
> > - /* Error handling */
> > - /* You must reset (stop/restart) after each interrupt */
> > - rz_ssi_stop(ssi, strm);
> > -
> > - /* Clear all flags */
> > - rz_ssi_reg_mask_setl(ssi, SSISR, SSISR_TOIRQ |
> > - SSISR_TUIRQ | SSISR_ROIRQ |
> > - SSISR_RUIRQ, 0);
> > -
> > - /* Add/remove more data */
> > - strm->transfer(ssi, strm);
> > -
> > - /* Resume */
> > - rz_ssi_start(ssi, strm);
> > + bool is_stopped = false;
> > + int i, count;
> > +
> > + if (rz_ssi_is_dma_enabled(ssi))
> > + count = 4;
> > + else
> > + count = 1;
> > +
> > + if (ssisr & (SSISR_RUIRQ | SSISR_ROIRQ | SSISR_TUIRQ |
> > SSISR_TOIRQ))
> > + is_stopped = true;
> > +
> > + if (ssi->capture.substream && is_stopped) {
> > + if (ssisr & SSISR_RUIRQ)
> > + strm_capture->uerr_num++;
> > + if (ssisr & SSISR_ROIRQ)
> > + strm_capture->oerr_num++;
> > +
> > + rz_ssi_stop(ssi, strm_capture);
> > }
> > +
> > + if (ssi->playback.substream && is_stopped) {
> > + if (ssisr & SSISR_TUIRQ)
> > + strm_playback->uerr_num++;
> > + if (ssisr & SSISR_TOIRQ)
> > + strm_playback->oerr_num++;
> > +
> > + rz_ssi_stop(ssi, strm_playback);
> > + }
> > +
> > + /* Clear all flags */
> > + rz_ssi_reg_mask_setl(ssi, SSISR, SSISR_TOIRQ |
> > SSISR_TUIRQ |
> > + SSISR_ROIRQ | SSISR_RUIRQ, 0);
> > +
> > + /* Add/remove more data */
> > + if (ssi->capture.substream && is_stopped) {
> > + for (i = 0; i < count; i++)
> > + strm_capture->transfer(ssi, strm_capture);
> > + }
> > +
> > + if (ssi->playback.substream && is_stopped) {
> > + for (i = 0; i < count; i++)
> > + strm_playback->transfer(ssi,
> > strm_playback);
> > + }
> > +
> > + /* Resume */
> > + if (ssi->playback.substream && is_stopped)
> > + rz_ssi_start(ssi, &ssi->playback);
> > + if (ssi->capture.substream && is_stopped)
> > + rz_ssi_start(ssi, &ssi->capture);
> > }
> >
> > - if (!strm->running)
> > + if (!rz_ssi_is_stream_running(&ssi->playback) &&
> > + !rz_ssi_is_stream_running(&ssi->capture))
> > return IRQ_HANDLED;
> >
> > /* tx data empty */
> > - if (irq == ssi->irq_tx)
> > - strm->transfer(ssi, &ssi->playback);
> > + if (irq == ssi->irq_tx && rz_ssi_is_stream_running(&ssi->playback))
> > + strm_playback->transfer(ssi, &ssi->playback);
> >
> > /* rx data full */
> > - if (irq == ssi->irq_rx) {
> > - strm->transfer(ssi, &ssi->capture);
> > + if (irq == ssi->irq_rx && rz_ssi_is_stream_running(&ssi->capture)) {
> > + strm_capture->transfer(ssi, &ssi->capture);
> > rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
> > }
> >
> > if (irq == ssi->irq_rt) {
> > - struct snd_pcm_substream *substream = strm->substream;
> > -
> > - if (rz_ssi_stream_is_play(ssi, substream)) {
> > - strm->transfer(ssi, &ssi->playback);
> > + if (ssi->playback.substream) {
> > + strm_playback->transfer(ssi, &ssi->playback);
> > } else {
> > - strm->transfer(ssi, &ssi->capture);
> > + strm_capture->transfer(ssi, &ssi->capture);
> > rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
> > }
> > }
> > @@ -732,9 +797,12 @@ static int rz_ssi_dai_trigger(struct
> > snd_pcm_substream *substream, int cmd,
> > switch (cmd) {
> > case SNDRV_PCM_TRIGGER_START:
> > /* Soft Reset */
> > - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST);
> > - rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0);
> > - udelay(5);
> > + if (!rz_ssi_is_stream_running(&ssi->playback) &&
> > + !rz_ssi_is_stream_running(&ssi->capture)) {
> > + rz_ssi_reg_mask_setl(ssi, SSIFCR, 0,
> > SSIFCR_SSIRST);
> > + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST,
> > 0);
> > + udelay(5);
> > + }
> >
> > rz_ssi_stream_init(strm, substream);
> >
> > @@ -825,14 +893,41 @@ static int rz_ssi_dai_set_fmt(struct snd_soc_dai
> > *dai, unsigned int fmt)
> > return 0;
> > }
> >
> > +static bool rz_ssi_is_valid_hw_params(struct rz_ssi_priv *ssi,
> > +unsigned int
> > rate,
> > + unsigned int channels,
> > + unsigned int sample_width,
> > + unsigned int sample_bits)
> > +{
> > + if (ssi->hw_params_cache.rate != rate ||
> > + ssi->hw_params_cache.channels != channels ||
> > + ssi->hw_params_cache.sample_width != sample_width ||
> > + ssi->hw_params_cache.sample_bits != sample_bits)
> > + return false;
> > +
> > + return true;
> > +}
> > +
> > +static void rz_ssi_cache_hw_params(struct rz_ssi_priv *ssi, unsigned
> > +int
> > rate,
> > + unsigned int channels,
> > + unsigned int sample_width,
> > + unsigned int sample_bits)
> > +{
> > + ssi->hw_params_cache.rate = rate;
> > + ssi->hw_params_cache.channels = channels;
> > + ssi->hw_params_cache.sample_width = sample_width;
> > + ssi->hw_params_cache.sample_bits = sample_bits; }
> > +
> > static int rz_ssi_dai_hw_params(struct snd_pcm_substream *substream,
> > struct snd_pcm_hw_params *params,
> > struct snd_soc_dai *dai)
> > {
> > struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai);
> > + struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream);
> > unsigned int sample_bits = hw_param_interval(params,
> >
> > SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
> > unsigned int channels = params_channels(params);
> > + unsigned int rate = params_rate(params);
> >
> > if (sample_bits != 16) {
> > dev_err(ssi->dev, "Unsupported sample width: %d\n", @@
> > -846,8 +941,20 @@ static int rz_ssi_dai_hw_params(struct
> > snd_pcm_substream *substream,
> > return -EINVAL;
> > }
> >
> > - return rz_ssi_clk_setup(ssi, params_rate(params),
> > - params_channels(params));
> > + if (rz_ssi_is_stream_running(&ssi->playback) ||
> > + rz_ssi_is_stream_running(&ssi->capture)) {
> > + if (rz_ssi_is_valid_hw_params(ssi, rate, channels,
> > + strm->sample_width,
> > sample_bits))
> > + return 0;
> > +
> > + dev_err(ssi->dev, "Full duplex needs same HW params\n");
> > + return -EINVAL;
> > + }
> > +
> > + rz_ssi_cache_hw_params(ssi, rate, channels, strm->sample_width,
> > + sample_bits);
> > +
> > + return rz_ssi_clk_setup(ssi, rate, channels);
> > }
> >
> > static const struct snd_soc_dai_ops rz_ssi_dai_ops = {
> > --
> > 2.43.0
>
> Best regards,
> Nobuhiro
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (15 preceding siblings ...)
2024-10-02 17:04 ` [PATCH 6.1.y-cip 16/16] arm64: dts: renesas: r9a07g043u11-smarc: Enable DU Biju Das
@ 2024-10-03 10:36 ` Pavel Machek
2024-10-04 15:48 ` Pavel Machek
17 siblings, 0 replies; 23+ messages in thread
From: Pavel Machek @ 2024-10-03 10:36 UTC (permalink / raw)
To: Biju Das; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Lad Prabhakar
[-- Attachment #1: Type: text/plain, Size: 660 bytes --]
Hi!
> This patch series aim to add support for
> 1) RZ/G2UL display
> 2) Audio full duplex
> 3) Auto loading for CSI driver
>
> All the patches are cherry-picked from the mainline
I went through patches, and apart from Iwamatsu-san comments, patches
look ok to me.
This one has to wait:
> pinctrl: renesas: rzg2l: Use dev_err_probe()
But I believe I can apply the rest if they pass testing and there are
no other comments.
Same applies to 5.10 series.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
` (16 preceding siblings ...)
2024-10-03 10:36 ` [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Pavel Machek
@ 2024-10-04 15:48 ` Pavel Machek
17 siblings, 0 replies; 23+ messages in thread
From: Pavel Machek @ 2024-10-04 15:48 UTC (permalink / raw)
To: Biju Das; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Lad Prabhakar
[-- Attachment #1: Type: text/plain, Size: 465 bytes --]
Hi!
> This patch series aim to add support for
> 1) RZ/G2UL display
> 2) Audio full duplex
> 3) Auto loading for CSI driver
>
> All the patches are cherry-picked from the mainline
Thank you. Applied, with exception of "02/16 pinctrl: renesas: rzg2l:
Use dev_err_probe()".
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2024-10-04 15:48 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-10-02 17:03 [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 01/16] arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device node Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 02/16] pinctrl: renesas: rzg2l: Use dev_err_probe() Biju Das
2024-10-03 5:28 ` nobuhiro1.iwamatsu
2024-10-03 6:15 ` Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 03/16] media: platform: rzg2l-cru: rzg2l-csi2: Add missing MODULE_DEVICE_TABLE Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 04/16] ASoC: sh: rz-ssi: Add full duplex support Biju Das
2024-10-03 5:53 ` nobuhiro1.iwamatsu
2024-10-03 6:33 ` Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 05/16] clk: renesas: r9a07g043: Add LCDC clock and reset entries Biju Das
2024-10-02 17:03 ` [PATCH 6.1.y-cip 06/16] media: dt-bindings: media: renesas,vsp1: Document RZ/V2L VSPD bindings Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 07/16] media: dt-bindings: media: renesas,vsp1: Document RZ/G2UL " Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 08/16] media: dt-bindings: media: renesas,fcp: Document RZ/{G2L,V2L} FCPVD bindings Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 09/16] media: dt-bindings: media: renesas,fcp: Document RZ/G2UL " Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 10/16] dt-bindings: display: renesas,rzg2l-du: Document RZ/G2UL DU bindings Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 11/16] drm: renesas: Move RZ/G2L MIPI DSI driver to rz-du Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 12/16] drm: renesas: rz-du: Add RZ/G2UL DU Support Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 13/16] arm64: dts: renesas: r9a07g043u: Add FCPVD node Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 14/16] arm64: dts: renesas: r9a07g043u: Add VSPD node Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 15/16] arm64: dts: renesas: r9a07g043u: Add DU node Biju Das
2024-10-02 17:04 ` [PATCH 6.1.y-cip 16/16] arm64: dts: renesas: r9a07g043u11-smarc: Enable DU Biju Das
2024-10-03 10:36 ` [PATCH 6.1.y-cip 00/16] Full duplex audio + RZ/G2UL DU support Pavel Machek
2024-10-04 15:48 ` Pavel Machek
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