From: Pavel Machek <pavel@denx.de>
To: ovidiu.panait.rb@renesas.com
Cc: cip-dev@lists.cip-project.org, nobuhiro.iwamatsu.x90@mail.toshiba
Subject: Re: [cip-dev] [PATCH 6.1.y-cip 05/12] soc: renesas: rz-sysc: Add SoC identification for RZ/V2N SoC
Date: Thu, 4 Dec 2025 11:43:26 +0100 [thread overview]
Message-ID: <aTFlzjpLCnKUTDKK@duo.ucw.cz> (raw)
In-Reply-To: <20251203153757.32977-6-ovidiu.panait.rb@renesas.com>
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Hi!
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> commit 3903b4701bc03d7d805c3df378a7fc2ff72cbef5 upstream.
>
> Add SoC identification for the RZ/V2N SoC using the System Controller
> (SYS) block.
So this is kind of strange driver: it gets hardware description,
prints it to dmesg, and that's it. No sysfs interface, no interface
for other kernel parts, no nothing.
Best regards,
Pavel
> +++ b/drivers/soc/renesas/r9a09g056-sys.c
> +static void rzv2n_sys_print_id(struct device *dev,
> + void __iomem *sysc_base,
> + struct soc_device_attribute *soc_dev_attr)
> +{
> + u32 prr_val, mode_val;
> + u8 feature_flags;
> +
> + prr_val = readl(sysc_base + SYS_LSI_PRR);
> + mode_val = readl(sysc_base + SYS_LSI_MODE);
> +
> + /* Check GPU, ISP and Cryptographic configuration */
> + feature_flags = !(prr_val & SYS_LSI_PRR_GPU_DIS) ? SYS_RZV2N_FEATURE_G31 : 0;
> + feature_flags |= !(prr_val & SYS_LSI_PRR_ISP_DIS) ? SYS_RZV2N_FEATURE_C55 : 0;
> + feature_flags |= (mode_val & SYS_LSI_MODE_SEC_EN) ? SYS_RZV2N_FEATURE_SEC : 0;
> +
> + dev_info(dev, "Detected Renesas %s %sn%d Rev %s%s%s%s%s\n", soc_dev_attr->family,
> + soc_dev_attr->soc_id, 41 + feature_flags, soc_dev_attr->revision,
> + feature_flags ? " with" : "",
> + feature_flags & SYS_RZV2N_FEATURE_G31 ? " GE3D (Mali-G31)" : "",
> + feature_flags & SYS_RZV2N_FEATURE_SEC ? " Cryptographic engine" : "",
> + feature_flags & SYS_RZV2N_FEATURE_C55 ? " ISP (Mali-C55)" : "");
> +
> + /* Check CA55 PLL configuration */
> + if (FIELD_GET(SYS_LSI_MODE_STAT_BOOTPLLCA55, mode_val) != SYS_LSI_MODE_CA55_1_7GHZ)
> + dev_warn(dev, "CA55 PLL is not set to 1.7GHz\n");
> +}
> +
> +static const struct rz_sysc_soc_id_init_data rzv2n_sys_soc_id_init_data __initconst = {
> + .family = "RZ/V2N",
> + .id = 0x867d447,
> + .devid_offset = 0x304,
> + .revision_mask = GENMASK(31, 28),
> + .specific_id_mask = GENMASK(27, 0),
> + .print_id = rzv2n_sys_print_id,
> +};
> +
> +const struct rz_sysc_init_data rzv2n_sys_init_data = {
> + .soc_id_init_data = &rzv2n_sys_soc_id_init_data,
> +};
--
In cooperation with DENX Software Engineering GmbH, HRB 165235 Munich,
Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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next prev parent reply other threads:[~2025-12-04 10:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-03 15:37 [PATCH 6.1.y-cip 00/12] Add initial support for RZ/V2N EVK Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 01/12] dt-bindings: soc: renesas: Move renesas.yaml from arm to soc Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 02/12] dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 03/12] soc: renesas: Add config option for RZ/V2N (R9A09G056) SoC Ovidiu Panait
2025-12-04 10:41 ` [cip-dev] " Pavel Machek
2025-12-03 15:37 ` [PATCH 6.1.y-cip 04/12] dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 05/12] soc: renesas: rz-sysc: Add SoC identification " Ovidiu Panait
2025-12-04 10:43 ` Pavel Machek [this message]
2025-12-03 15:37 ` [PATCH 6.1.y-cip 06/12] dt-bindings: serial: renesas: Document RZ/V2N SCIF Ovidiu Panait
2025-12-04 10:45 ` [cip-dev] " Pavel Machek
2025-12-03 15:37 ` [PATCH 6.1.y-cip 07/12] dt-bindings: mmc: renesas,sdhi: Document RZ/V2N support Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 08/12] dt-bindings: clock: renesas: Document RZ/V2N SoC CPG Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 09/12] clk: renesas: rzv2h: Add support for RZ/V2N SoC Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 10/12] arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 11/12] arm64: dts: renesas: Add initial device tree for RZ/V2N EVK Ovidiu Panait
2025-12-03 15:37 ` [PATCH 6.1.y-cip 12/12] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs Ovidiu Panait
2025-12-04 11:04 ` [cip-dev] [PATCH 6.1.y-cip 00/12] Add initial support for RZ/V2N EVK Pavel Machek
2025-12-05 11:33 ` Pavel Machek
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