Re: [PATCH 6.12.y-cip 23/38] clk: renesas: Add CPG/MSSR support to RZ/N2H SoC

Pavel Machek
2025-12-12T12:56:25Z

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Hi!

> Add clock driver support for the Renesas RZ/N2H (R9A09G087) SoC by reusing
> the existing RZ/T2H (R9A09G077) CPG/MSSR implementation, as both SoCs
> share the same clock and reset architecture.

> +++ b/drivers/clk/renesas/Makefile
> @@ -41,6 +41,7 @@ obj-$(CONFIG_CLK_R9A09G047) += r9a09g047-cpg.o
> obj-$(CONFIG_CLK_R9A09G056) += r9a09g056-cpg.o
> obj-$(CONFIG_CLK_R9A09G057) += r9a09g057-cpg.o
> obj-$(CONFIG_CLK_R9A09G077) += r9a09g077-cpg.o
> +obj-$(CONFIG_CLK_R9A09G087) += r9a09g077-cpg.o
> obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o

This is kind of strange -- two options selecting same file. I believe
it is correct based on code below.

Best regards,
Pavel

> +++ b/drivers/clk/renesas/renesas-cpg-mssr.c
> @@ -948,6 +948,12 @@ static const struct of_device_id cpg_mssr_match[] = {
> .compatible = "renesas,r9a09g077-cpg-mssr",
> .data = &r9a09g077_cpg_mssr_info,
> },
> +#endif
> +#ifdef CONFIG_CLK_R9A09G087
> + {
> + .compatible = "renesas,r9a09g087-cpg-mssr",
> + .data = &r9a09g077_cpg_mssr_info,
> + },
> #endif
> { /* sentinel */ }
> };

--
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Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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