RE: [PATCH 6.12.y-cip 23/38] clk: renesas: Add CPG/MSSR support to RZ/N2H SoC

Prabhakar Mahadev Lad
2025-12-12T18:09:36Z

Hi Pavel,

Thank you for the review.

> Subject: Re: [PATCH 6.12.y-cip 23/38] clk: renesas: Add CPG/MSSR support
> to RZ/N2H SoC
>
> Hi!
>
> > Add clock driver support for the Renesas RZ/N2H (R9A09G087) SoC by
> > reusing the existing RZ/T2H (R9A09G077) CPG/MSSR implementation, as
> > both SoCs share the same clock and reset architecture.
>
> > +++ b/drivers/clk/renesas/Makefile
> > @@ -41,6 +41,7 @@ obj-$(CONFIG_CLK_R9A09G047) += r9a09g047-cpg.o
> > obj-$(CONFIG_CLK_R9A09G056) += r9a09g056-cpg.o
> > obj-$(CONFIG_CLK_R9A09G057) += r9a09g057-cpg.o
> > obj-$(CONFIG_CLK_R9A09G077) += r9a09g077-cpg.o
> > +obj-$(CONFIG_CLK_R9A09G087) += r9a09g077-cpg.o
> > obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
>
> This is kind of strange -- two options selecting same file. I believe it
> is correct based on code below.
>
Yes, as both the SoCs use the same r9a09g077-cpg.c file for clock handling.

Cheers,
Prabhakar