* [PATCH 6.1.y-cip 1/3] net: phy: add configuration of rx clock stop mode
2025-12-29 8:39 [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Ovidiu Panait
@ 2025-12-29 8:39 ` Ovidiu Panait
2026-01-04 17:28 ` [cip-dev] " Pavel Machek
2025-12-29 8:39 ` [PATCH 6.1.y-cip 2/3] net: stmmac: Fix VLAN 0 deletion in vlan_del_hw_rx_fltr() Ovidiu Panait
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Ovidiu Panait @ 2025-12-29 8:39 UTC (permalink / raw)
To: cip-dev, pavel, nobuhiro.iwamatsu.x90
From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
commit cf337105ad38564d7855151889a7315da73119d0 upstream.
Add a function to allow configuration of the PCS's clock stop enable
bit, used to configure whether the xMII receive clock can be stopped
during LPI mode.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Choong Yong Liang <yong.liang.choong@linux.intel.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1tVZDR-0002Jl-Ry@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
[OP: Added error handling and called phy_eee_rx_clock_stop()
unconditionally to clear clock stop bits when disabled.]
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/net/phy/phy.c | 32 ++++++++++++++++++++++++++------
include/linux/phy.h | 1 +
2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index d1aea767ed09..8448686d3b17 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1297,6 +1297,27 @@ static void mmd_eee_adv_to_linkmode(unsigned long *advertising, u16 eee_adv)
advertising);
}
+/**
+ * phy_eee_rx_clock_stop() - configure PHY receive clock in LPI
+ * @phydev: target phy_device struct
+ * @clk_stop_enable: flag to indicate whether the clock can be stopped
+ *
+ * Configure whether the PHY can disable its receive clock during LPI mode,
+ * See IEEE 802.3 sections 22.2.2.2, 35.2.2.10, and 45.2.3.1.4.
+ *
+ * Returns: 0 or negative error.
+ */
+int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable)
+{
+ /* Configure the PHY to stop receiving xMII
+ * clock while it is signaling LPI.
+ */
+ return phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,
+ MDIO_PCS_CTRL1_CLKSTOP_EN,
+ clk_stop_enable ? MDIO_PCS_CTRL1_CLKSTOP_EN : 0);
+}
+EXPORT_SYMBOL_GPL(phy_eee_rx_clock_stop);
+
/**
* phy_init_eee - init and check the EEE feature
* @phydev: target phy_device struct
@@ -1309,6 +1330,8 @@ static void mmd_eee_adv_to_linkmode(unsigned long *advertising, u16 eee_adv)
*/
int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
{
+ int ret;
+
if (!phydev->drv)
return -EIO;
@@ -1354,12 +1377,9 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
if (!phy_check_valid(phydev->speed, phydev->duplex, common))
goto eee_exit_err;
- if (clk_stop_enable)
- /* Configure the PHY to stop receiving xMII
- * clock while it is signaling LPI.
- */
- phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,
- MDIO_PCS_CTRL1_CLKSTOP_EN);
+ ret = phy_eee_rx_clock_stop(phydev, clk_stop_enable);
+ if (ret < 0)
+ return ret;
return 0; /* EEE supported */
}
diff --git a/include/linux/phy.h b/include/linux/phy.h
index a8c6e3c29ed6..3d97a222f9b1 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -1765,6 +1765,7 @@ int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
int phy_unregister_fixup_for_id(const char *bus_id);
int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
+int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable);
int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
int phy_get_eee_err(struct phy_device *phydev);
int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
--
2.51.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [cip-dev] [PATCH 6.1.y-cip 1/3] net: phy: add configuration of rx clock stop mode
2025-12-29 8:39 ` [PATCH 6.1.y-cip 1/3] net: phy: add configuration of rx clock stop mode Ovidiu Panait
@ 2026-01-04 17:28 ` Pavel Machek
0 siblings, 0 replies; 7+ messages in thread
From: Pavel Machek @ 2026-01-04 17:28 UTC (permalink / raw)
To: ovidiu.panait.rb; +Cc: cip-dev, nobuhiro.iwamatsu.x90
[-- Attachment #1: Type: text/plain, Size: 1592 bytes --]
Hi!
> From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
>
> commit cf337105ad38564d7855151889a7315da73119d0 upstream.
>
> Add a function to allow configuration of the PCS's clock stop enable
> bit, used to configure whether the xMII receive clock can be stopped
> during LPI mode.
>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> Tested-by: Choong Yong Liang <yong.liang.choong@linux.intel.com>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
> Link: https://patch.msgid.link/E1tVZDR-0002Jl-Ry@rmk-PC.armlinux.org.uk
> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
> [OP: Added error handling and called phy_eee_rx_clock_stop()
> unconditionally to clear clock stop bits when disabled.]
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> +++ b/drivers/net/phy/phy.c
> @@ -1354,12 +1377,9 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
> if (!phy_check_valid(phydev->speed, phydev->duplex, common))
> goto eee_exit_err;
>
> - if (clk_stop_enable)
> - /* Configure the PHY to stop receiving xMII
> - * clock while it is signaling LPI.
> - */
> - phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,
> - MDIO_PCS_CTRL1_CLKSTOP_EN);
> + ret = phy_eee_rx_clock_stop(phydev, clk_stop_enable);
> + if (ret < 0)
> + return ret;
>
> return 0; /* EEE supported */
> }
Does clock_stop ever return values > 0? If no, this can be simply
return phy_eee_rx_clock_stop(phydev, clk_stop_enable);
Best regards,
Pavel
--
In cooperation with Nabla.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 6.1.y-cip 2/3] net: stmmac: Fix VLAN 0 deletion in vlan_del_hw_rx_fltr()
2025-12-29 8:39 [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Ovidiu Panait
2025-12-29 8:39 ` [PATCH 6.1.y-cip 1/3] net: phy: add configuration of rx clock stop mode Ovidiu Panait
@ 2025-12-29 8:39 ` Ovidiu Panait
2025-12-29 8:39 ` [PATCH 6.1.y-cip 3/3] net: stmmac: Disable EEE RX clock stop when VLAN is enabled Ovidiu Panait
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Ovidiu Panait @ 2025-12-29 8:39 UTC (permalink / raw)
To: cip-dev, pavel, nobuhiro.iwamatsu.x90
commit d9db25723677c3741a0cf3643f7f7429fc983921 upstream.
When the "rx-vlan-filter" feature is enabled on a network device, the 8021q
module automatically adds a VLAN 0 hardware filter when the device is
brought administratively up.
For stmmac, this causes vlan_add_hw_rx_fltr() to create a new entry for
VID 0 in the mac_device_info->vlan_filter array, in the following format:
VLAN_TAG_DATA_ETV | VLAN_TAG_DATA_VEN | vid
Here, VLAN_TAG_DATA_VEN indicates that the hardware filter is enabled for
that VID.
However, on the delete path, vlan_del_hw_rx_fltr() searches the vlan_filter
array by VID only, without verifying whether a VLAN entry is enabled. As a
result, when the 8021q module attempts to remove VLAN 0, the function may
mistakenly match a zero-initialized slot rather than the actual VLAN 0
entry, causing incorrect deletions and leaving stale entries in the
hardware table.
Fix this by verifying that the VLAN entry's enable bit (VLAN_TAG_DATA_VEN)
is set before matching and deleting by VID. This ensures only active VLAN
entries are removed and avoids leaving stale entries in the VLAN filter
table, particularly for VLAN ID 0.
Fixes: ed64639bc1e08 ("net: stmmac: Add support for VLAN Rx filtering")
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Link: https://patch.msgid.link/20251113112721.70500-2-ovidiu.panait.rb@renesas.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
[OP: Applied the fix in dwmac4_del_hw_vlan_rx_fltr() function]
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index c75868f3ceae..f38e25895ac1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -568,7 +568,8 @@ static int dwmac4_del_hw_vlan_rx_fltr(struct net_device *dev,
/* Extended Rx VLAN Filter Enable */
for (i = 0; i < hw->num_vlan; i++) {
- if ((hw->vlan_filter[i] & GMAC_VLAN_TAG_DATA_VID) == vid) {
+ if ((hw->vlan_filter[i] & GMAC_VLAN_TAG_DATA_VEN) &&
+ (hw->vlan_filter[i] & GMAC_VLAN_TAG_DATA_VID) == vid) {
ret = dwmac4_write_vlan_filter(dev, hw, i, 0);
if (!ret)
--
2.51.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 6.1.y-cip 3/3] net: stmmac: Disable EEE RX clock stop when VLAN is enabled
2025-12-29 8:39 [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Ovidiu Panait
2025-12-29 8:39 ` [PATCH 6.1.y-cip 1/3] net: phy: add configuration of rx clock stop mode Ovidiu Panait
2025-12-29 8:39 ` [PATCH 6.1.y-cip 2/3] net: stmmac: Fix VLAN 0 deletion in vlan_del_hw_rx_fltr() Ovidiu Panait
@ 2025-12-29 8:39 ` Ovidiu Panait
2026-01-04 17:29 ` [cip-dev] [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Pavel Machek
2026-01-07 8:17 ` nobuhiro.iwamatsu.x90
4 siblings, 0 replies; 7+ messages in thread
From: Ovidiu Panait @ 2025-12-29 8:39 UTC (permalink / raw)
To: cip-dev, pavel, nobuhiro.iwamatsu.x90
commit c171e679ee66d7c0e2b58db9531af96797a76bca upstream.
On the Renesas RZ/V2H EVK platform, where the stmmac MAC is connected to a
Microchip KSZ9131RNXI PHY, creating or deleting VLAN interfaces may fail
with timeouts:
# ip link add link end1 name end1.5 type vlan id 5
15c40000.ethernet end1: Timeout accessing MAC_VLAN_Tag_Filter
RTNETLINK answers: Device or resource busy
Disabling EEE at runtime avoids the problem:
# ethtool --set-eee end1 eee off
# ip link add link end1 name end1.5 type vlan id 5
# ip link del end1.5
The stmmac hardware requires the receive clock to be running when writing
certain registers, such as those used for MAC address configuration or
VLAN filtering. However, by default the driver enables Energy Efficient
Ethernet (EEE) and allows the PHY to stop the receive clock when the link
is idle. As a result, the RX clock might be stopped when attempting to
access these registers, leading to timeouts and other issues.
Commit dd557266cf5fb ("net: stmmac: block PHY RXC clock-stop")
addressed this issue for most register accesses by wrapping them in
phylink_rx_clk_stop_block()/phylink_rx_clk_stop_unblock() calls.
However, VLAN add/delete operations may be invoked with bottom halves
disabled, where sleeping is not allowed, so using these helpers is not
possible.
Therefore, to fix this, disable the RX clock stop feature in the phylink
configuration if VLAN features are set. This ensures the RX clock remains
active and register accesses succeed during VLAN operations.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/20251113112721.70500-3-ovidiu.panait.rb@renesas.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
[OP: Phylink-managed EEE RX clock-stop control is not available in 6.1.
Adapted the fix to use the existing RX clock-stop handling in
stmmac_mac_link_up().]
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 5cf9077a7db2..ce4339d2a9d4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1126,8 +1126,14 @@ static void stmmac_mac_link_up(struct phylink_config *config,
stmmac_mac_set(priv, priv->ioaddr, true);
if (phy && priv->dma_cap.eee) {
+ /* Disable EEE RX clock stop to ensure VLAN register access works
+ * correctly.
+ */
+ bool clk_stop_enable = !priv->plat->rx_clk_runs_in_lpi &&
+ !(priv->dev->features & NETIF_F_VLAN_FEATURES);
+
priv->eee_active =
- phy_init_eee(phy, !priv->plat->rx_clk_runs_in_lpi) >= 0;
+ phy_init_eee(phy, clk_stop_enable) >= 0;
priv->eee_enabled = stmmac_eee_init(priv);
priv->tx_lpi_enabled = priv->eee_enabled;
stmmac_set_eee_pls(priv, priv->hw, true);
--
2.51.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [cip-dev] [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues
2025-12-29 8:39 [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Ovidiu Panait
` (2 preceding siblings ...)
2025-12-29 8:39 ` [PATCH 6.1.y-cip 3/3] net: stmmac: Disable EEE RX clock stop when VLAN is enabled Ovidiu Panait
@ 2026-01-04 17:29 ` Pavel Machek
2026-01-07 8:17 ` nobuhiro.iwamatsu.x90
4 siblings, 0 replies; 7+ messages in thread
From: Pavel Machek @ 2026-01-04 17:29 UTC (permalink / raw)
To: ovidiu.panait.rb; +Cc: cip-dev, nobuhiro.iwamatsu.x90
[-- Attachment #1: Type: text/plain, Size: 1640 bytes --]
Hi!
>
> When testing Ethernet on the Renesas RZ/V2H and RZ/V2N platforms with
> 6.1-cip, LPI interrupt storms and VLAN register access timeouts were
> observed.
>
> Both issues are caused by the RX clock stop feature being enabled by
> default. When EEE is active and the link is idle, the PHY stops the
> RX clock to save power. However, the stmmac hardware requires the RX
> clock to be running when accessing certain registers.
>
> More specifically, VLAN operations fail with:
>
> # ip link add link end1 name end1.5 type vlan id 5
> 15c40000.ethernet end1: Timeout accessing MAC_VLAN_Tag_Filter
> RTNETLINK answers: Device or resource busy
>
> Also, LPI interrupt storms occur because the RX clock may be stopped when
> the driver attempts to clear the pending interrupt. The interrupt is
> not cleared and keeps re-triggering until the RX clock resumes.
>
> A comprehensive overview of RX clock related issues in stmmac can be
> found in these threads:
> https://lore.kernel.org/all/20251026122905.29028-1-laurent.pinchart@ideasonboard.com/
> https://lore.kernel.org/all/Z9ySeo61VYTClIJJ@shell.armlinux.org.uk/
>
> These issues are already fixed in mainline. This series backports the
> relevant stmmac EEE fixes to 6.1-cip.
I had a minor comment here, but that should be fixed in mainline,
first, so should not block the merge.
Reviewed-by: Pavel Machek <pavel@nabladev.com>
I can apply the series if it passes testing and there are no other
comments.
Best regards,
Pavel
--
In cooperation with Nabla.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread* RE: [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues
2025-12-29 8:39 [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Ovidiu Panait
` (3 preceding siblings ...)
2026-01-04 17:29 ` [cip-dev] [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues Pavel Machek
@ 2026-01-07 8:17 ` nobuhiro.iwamatsu.x90
4 siblings, 0 replies; 7+ messages in thread
From: nobuhiro.iwamatsu.x90 @ 2026-01-07 8:17 UTC (permalink / raw)
To: ovidiu.panait.rb, cip-dev, pavel
Hi all,
> -----Original Message-----
> From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> Sent: Monday, December 29, 2025 5:40 PM
> To: cip-dev@lists.cip-project.org; pavel@denx.de; iwamatsu nobuhiro(岩松 信洋
> □DITC○CPT) <nobuhiro.iwamatsu.x90@mail.toshiba>
> Subject: [PATCH 6.1.y-cip 0/3] net: stmmac: Fix EEE-related issues
>
> Hi,
>
> When testing Ethernet on the Renesas RZ/V2H and RZ/V2N platforms with
> 6.1-cip, LPI interrupt storms and VLAN register access timeouts were observed.
>
> Both issues are caused by the RX clock stop feature being enabled by default.
> When EEE is active and the link is idle, the PHY stops the RX clock to save power.
> However, the stmmac hardware requires the RX clock to be running when
> accessing certain registers.
>
> More specifically, VLAN operations fail with:
>
> # ip link add link end1 name end1.5 type vlan id 5
> 15c40000.ethernet end1: Timeout accessing MAC_VLAN_Tag_Filter
> RTNETLINK answers: Device or resource busy
>
> Also, LPI interrupt storms occur because the RX clock may be stopped when the
> driver attempts to clear the pending interrupt. The interrupt is not cleared and
> keeps re-triggering until the RX clock resumes.
>
> A comprehensive overview of RX clock related issues in stmmac can be found in
> these threads:
> https://lore.kernel.org/all/20251026122905.29028-1-laurent.pinchart@ideason
> board.com/
> https://lore.kernel.org/all/Z9ySeo61VYTClIJJ@shell.armlinux.org.uk/
>
> These issues are already fixed in mainline. This series backports the relevant
> stmmac EEE fixes to 6.1-cip.
>
> Best regards,
> Ovidiu
>
>
> Ovidiu Panait (2):
> net: stmmac: Fix VLAN 0 deletion in vlan_del_hw_rx_fltr()
> net: stmmac: Disable EEE RX clock stop when VLAN is enabled
>
> Russell King (Oracle) (1):
> net: phy: add configuration of rx clock stop mode
>
> .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 3
> +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 8 ++++-
> drivers/net/phy/phy.c | 32
> +++++++++++++++----
> include/linux/phy.h | 1 +
> 4 files changed, 36 insertions(+), 8 deletions(-)
>
> --
> 2.51.0
Looks good to me.
I will apply this with Pavel's reviewed-by tag.
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 7+ messages in thread