Re: [cip-dev] [PATCH 6.1.y-cip 11/22] i3c: master: Add inline i3c_readl_fifo() and i3c_writel_fifo()

[Pavel Machek <pavel@nabladev.com>]

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Hi!

> From: Jorge Marques <jorge.marques@analog.com>
> 
> commit 733b439375b494e8a6950ab47d18a4b615b73cb3 upstream.
> 
> The I3C abstraction expects u8 buffers, but some controllers operate with
> a 32-bit bus width FIFO and cannot flag valid bytes individually. To avoid
> reading or writing outside the buffer bounds, use 32-bit accesses where
> possible and apply memcpy for any remaining bytes

> +++ b/drivers/i3c/internals.h
> @@ -24,4 +24,41 @@ int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev);
>  int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
>  			       const struct i3c_ibi_setup *req);
>  void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev);
> +
> +/**
> + * i3c_writel_fifo - Write data buffer to 32bit FIFO
> + * @addr: FIFO Address to write to
> + * @buf: Pointer to the data bytes to write
> + * @nbytes: Number of bytes to write
> + */
> +static inline void i3c_writel_fifo(void __iomem *addr, const void *buf,
> +				   int nbytes)
> +{
> +	writesl(addr, buf, nbytes / 4);
> +	if (nbytes & 3) {
> +		u32 tmp = 0;
> +
> +		memcpy(&tmp, buf + (nbytes & ~3), nbytes & 3);
> +		writel(tmp, addr);
> +	}
> +}

That's quite an interesting code. Will it work correctly on both endianness?

> +/**
> + * i3c_readl_fifo - Read data buffer from 32bit FIFO
> + * @addr: FIFO Address to read from
> + * @buf: Pointer to the buffer to store read bytes
> + * @nbytes: Number of bytes to read
> + */
> +static inline void i3c_readl_fifo(const void __iomem *addr, void *buf,
> +				  int nbytes)
> +{
> +	readsl(addr, buf, nbytes / 4);
> +	if (nbytes & 3) {
> +		u32 tmp;
> +
> +		tmp = readl(addr);
> +		memcpy(buf + (nbytes & ~3), &tmp, nbytes & 3);
> +	}
> +}

Same question here.

Best regards,
									Pavel

-- 
In cooperation with Nabla.

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