* [PATCH 6.12.y-cip 1/6] irqchip/renesas-rzv2h: Prevent TINT spurious interrupt during resume
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
@ 2026-03-09 7:51 ` Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 2/6] irqchip/renesas-rzv2h: Remove unneeded includes Biju
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Biju @ 2026-03-09 7:51 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Biju Das <biju.das.jz@bp.renesas.com>
[ Upstream commit cd4a3ced4d1cdb14ffe905657b98a91e9d239dfb ]
A glitch in the edge detection circuit can cause a spurious interrupt. The
hardware manual recommends clearing the status flag after setting the
ICU_TSSRk register as a countermeasure.
Currently, a spurious interrupt is generated on the resume path of s2idle
for the PMIC RTC TINT interrupt due to a glitch related to unnecessary
enabling/disabling of the TINT enable bit.
Fix this issue by not setting TSSR(TINT Source) and TITSR(TINT Detection
Method Selection) registers if the values are the same as those set
in these registers.
Fixes: 0d7605e75ac2 ("irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) driver")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260113125315.359967-2-biju.das.jz@bp.renesas.com
[ Biju: Added non-const variant of field_get ]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/irqchip/irq-renesas-rzv2h.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-renesas-rzv2h.c
index 766adccf11dc..ea67da9459b7 100644
--- a/drivers/irqchip/irq-renesas-rzv2h.c
+++ b/drivers/irqchip/irq-renesas-rzv2h.c
@@ -92,6 +92,8 @@
#define ICU_RZG3E_TSSEL_MAX_VAL 0x8c
#define ICU_RZV2H_TSSEL_MAX_VAL 0x55
+#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
+
/**
* struct rzv2h_hw_info - Interrupt Control Unit controller hardware info structure.
* @tssel_lut: TINT lookup table
@@ -331,6 +333,7 @@ static int rzv2h_tint_set_type(struct irq_data *d, unsigned int type)
u32 titsr, titsr_k, titsel_n, tien;
struct rzv2h_icu_priv *priv;
u32 tssr, tssr_k, tssel_n;
+ u32 titsr_cur, tssr_cur;
unsigned int hwirq;
u32 tint, sense;
int tint_nr;
@@ -379,12 +382,18 @@ static int rzv2h_tint_set_type(struct irq_data *d, unsigned int type)
guard(raw_spinlock)(&priv->lock);
tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(tssr_k));
+ titsr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(titsr_k));
+
+ tssr_cur = field_get(ICU_TSSR_TSSEL_MASK(tssel_n, priv->info->field_width), tssr);
+ titsr_cur = field_get(ICU_TITSR_TITSEL_MASK(titsel_n), titsr);
+ if (tssr_cur == tint && titsr_cur == sense)
+ return 0;
+
tssr &= ~(ICU_TSSR_TSSEL_MASK(tssel_n, priv->info->field_width) | tien);
tssr |= ICU_TSSR_TSSEL_PREP(tint, tssel_n, priv->info->field_width);
writel_relaxed(tssr, priv->base + priv->info->t_offs + ICU_TSSR(tssr_k));
- titsr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(titsr_k));
titsr &= ~ICU_TITSR_TITSEL_MASK(titsel_n);
titsr |= ICU_TITSR_TITSEL_PREP(sense, titsel_n);
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6.12.y-cip 2/6] irqchip/renesas-rzv2h: Remove unneeded includes
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 1/6] irqchip/renesas-rzv2h: Prevent TINT spurious interrupt during resume Biju
@ 2026-03-09 7:51 ` Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 3/6] irqchip/renesas-rzv2h: Add suspend/resume support Biju
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Biju @ 2026-03-09 7:51 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Geert Uytterhoeven <geert+renesas@glider.be>
[ Upstream commit 41a5f82885e152c364e587ab30df4e582e96b73a ]
The RZ/V2H ICU driver does not use clocks, of_address, or syscore.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/d4fbffc39af2eaa7bc50a0a97ffb3a22e3c4cb6a.1751446168.git.geert+renesas@glider.be
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/irqchip/irq-renesas-rzv2h.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-renesas-rzv2h.c
index ea67da9459b7..6096199cce52 100644
--- a/drivers/irqchip/irq-renesas-rzv2h.c
+++ b/drivers/irqchip/irq-renesas-rzv2h.c
@@ -11,18 +11,15 @@
#include <linux/bitfield.h>
#include <linux/cleanup.h>
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/irqchip.h>
#include <linux/irqchip/irq-renesas-rzv2h.h>
#include <linux/irqdomain.h>
-#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/spinlock.h>
-#include <linux/syscore_ops.h>
/* DT "interrupts" indexes */
#define ICU_IRQ_START 1
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6.12.y-cip 3/6] irqchip/renesas-rzv2h: Add suspend/resume support
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 1/6] irqchip/renesas-rzv2h: Prevent TINT spurious interrupt during resume Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 2/6] irqchip/renesas-rzv2h: Remove unneeded includes Biju
@ 2026-03-09 7:51 ` Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 4/6] dt-bindings: can: renesas,rcar-canfd: Document renesas,fd-only property Biju
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Biju @ 2026-03-09 7:51 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Biju Das <biju.das.jz@bp.renesas.com>
[ Upstream commit 3a74e73b863a2493c0502a08e20ab026a0134ca1 ]
On RZ/G3E using PSCI, s2ram powers down the SoC. Add suspend/resume
callbacks to restore IRQ type for NMI, TINT and external IRQ interrupts.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260113125315.359967-3-biju.das.jz@bp.renesas.com
[ Biju:
Dropped function parameter from rzv2h_irqc_irq_{suspend,resume}()
Dropped rzv2h_irqc_syscore
Dropped const qualifier from rzv2h_irqc_syscore_ops
Replaced register_syscore->register_syscore_ops
]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/irqchip/irq-renesas-rzv2h.c | 56 +++++++++++++++++++++++++++--
1 file changed, 53 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-renesas-rzv2h.c
index 6096199cce52..ff3f84cfa8a1 100644
--- a/drivers/irqchip/irq-renesas-rzv2h.c
+++ b/drivers/irqchip/irq-renesas-rzv2h.c
@@ -20,6 +20,7 @@
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/spinlock.h>
+#include <linux/syscore_ops.h>
/* DT "interrupts" indexes */
#define ICU_IRQ_START 1
@@ -91,6 +92,18 @@
#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
+/**
+ * struct rzv2h_irqc_reg_cache - registers cache (necessary for suspend/resume)
+ * @nitsr: ICU_NITSR register
+ * @iitsr: ICU_IITSR register
+ * @titsr: ICU_TITSR registers
+ */
+struct rzv2h_irqc_reg_cache {
+ u32 nitsr;
+ u32 iitsr;
+ u32 titsr[2];
+};
+
/**
* struct rzv2h_hw_info - Interrupt Control Unit controller hardware info structure.
* @tssel_lut: TINT lookup table
@@ -120,13 +133,15 @@ struct rzv2h_hw_info {
* @fwspec: IRQ firmware specific data
* @lock: Lock to serialize access to hardware registers
* @info: Pointer to struct rzv2h_hw_info
+ * @cache: Registers cache for suspend/resume
*/
-struct rzv2h_icu_priv {
+static struct rzv2h_icu_priv {
void __iomem *base;
struct irq_fwspec fwspec[ICU_NUM_IRQ];
raw_spinlock_t lock;
const struct rzv2h_hw_info *info;
-};
+ struct rzv2h_irqc_reg_cache cache;
+} *rzv2h_icu_data;
void rzv2h_icu_register_dma_req(struct platform_device *icu_dev, u8 dmac_index, u8 dmac_channel,
u16 req_no)
@@ -421,6 +436,40 @@ static int rzv2h_icu_set_type(struct irq_data *d, unsigned int type)
return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH);
}
+static int rzv2h_irqc_irq_suspend(void)
+{
+ struct rzv2h_irqc_reg_cache *cache = &rzv2h_icu_data->cache;
+ void __iomem *base = rzv2h_icu_data->base;
+
+ cache->nitsr = readl_relaxed(base + ICU_NITSR);
+ cache->iitsr = readl_relaxed(base + ICU_IITSR);
+ for (unsigned int i = 0; i < 2; i++)
+ cache->titsr[i] = readl_relaxed(base + rzv2h_icu_data->info->t_offs + ICU_TITSR(i));
+
+ return 0;
+}
+
+static void rzv2h_irqc_irq_resume(void)
+{
+ struct rzv2h_irqc_reg_cache *cache = &rzv2h_icu_data->cache;
+ void __iomem *base = rzv2h_icu_data->base;
+
+ /*
+ * Restore only interrupt type. TSSRx will be restored at the
+ * request of pin controller to avoid spurious interrupts due
+ * to invalid PIN states.
+ */
+ for (unsigned int i = 0; i < 2; i++)
+ writel_relaxed(cache->titsr[i], base + rzv2h_icu_data->info->t_offs + ICU_TITSR(i));
+ writel_relaxed(cache->iitsr, base + ICU_IITSR);
+ writel_relaxed(cache->nitsr, base + ICU_NITSR);
+}
+
+static struct syscore_ops rzv2h_irqc_syscore_ops = {
+ .suspend = rzv2h_irqc_irq_suspend,
+ .resume = rzv2h_irqc_irq_resume,
+};
+
static const struct irq_chip rzv2h_icu_chip = {
.name = "rzv2h-icu",
.irq_eoi = rzv2h_icu_eoi,
@@ -508,7 +557,6 @@ static int rzv2h_icu_init_common(struct device_node *node, struct device_node *p
const struct rzv2h_hw_info *hw_info)
{
struct irq_domain *irq_domain, *parent_domain;
- struct rzv2h_icu_priv *rzv2h_icu_data;
struct platform_device *pdev;
struct reset_control *resetn;
int ret;
@@ -575,6 +623,8 @@ static int rzv2h_icu_init_common(struct device_node *node, struct device_node *p
rzv2h_icu_data->info = hw_info;
+ register_syscore_ops(&rzv2h_irqc_syscore_ops);
+
/*
* coccicheck complains about a missing put_device call before returning, but it's a false
* positive. We still need &pdev->dev after successfully returning from this function.
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6.12.y-cip 4/6] dt-bindings: can: renesas,rcar-canfd: Document renesas,fd-only property
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
` (2 preceding siblings ...)
2026-03-09 7:51 ` [PATCH 6.12.y-cip 3/6] irqchip/renesas-rzv2h: Add suspend/resume support Biju
@ 2026-03-09 7:51 ` Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 5/6] dt-bindings: can: renesas,rcar-canfd: Specify reset-names Biju
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Biju @ 2026-03-09 7:51 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Biju Das <biju.das.jz@bp.renesas.com>
[ Upstream commit 1766de15a571662fcd9c0a870de3a06890142a1e ]
The CANFD on RZ/{G2L,G3E} and R-Car Gen4 support 3 modes FD-Only mode,
Classical CAN mode and CAN-FD mode. In FD-Only mode, communication in
Classical CAN frame format is disabled. Document renesas,fd-only to handle
this mode. As these SoCs support 3 modes, update the description of
renesas,no-can-fd property and disallow it for R-Car Gen3.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20251126155911.320563-2-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/net/can/renesas,rcar-canfd.yaml | 38 +++++++++++++++++--
1 file changed, 35 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
index f4ac21c68427..e129bdceef84 100644
--- a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
+++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
@@ -125,9 +125,17 @@ properties:
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
description:
- The controller can operate in either CAN FD only mode (default) or
- Classical CAN only mode. The mode is global to all channels.
- Specify this property to put the controller in Classical CAN only mode.
+ The controller can operate in either CAN-FD mode (default) or FD-Only
+ mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this
+ property to put the controller in Classical CAN mode.
+
+ renesas,fd-only:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ The CANFD on RZ/{G2L,G3E} and R-Car Gen4 SoCs support 3 modes FD-Only
+ mode, Classical CAN mode and CAN-FD mode (default). In FD-Only mode,
+ communication in Classical CAN frame format is disabled. Specify this
+ property to put the controller in FD-Only mode.
assigned-clocks:
description:
@@ -267,6 +275,30 @@ allOf:
patternProperties:
"^channel[6-7]$": false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,rcar-gen3-canfd
+ then:
+ properties:
+ renesas,fd-only: false
+
+ - if:
+ required:
+ - renesas,no-can-fd
+ then:
+ properties:
+ renesas,fd-only: false
+
+ - if:
+ required:
+ - renesas,fd-only
+ then:
+ properties:
+ renesas,no-can-fd: false
+
unevaluatedProperties: false
examples:
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6.12.y-cip 5/6] dt-bindings: can: renesas,rcar-canfd: Specify reset-names
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
` (3 preceding siblings ...)
2026-03-09 7:51 ` [PATCH 6.12.y-cip 4/6] dt-bindings: can: renesas,rcar-canfd: Document renesas,fd-only property Biju
@ 2026-03-09 7:51 ` Biju
2026-03-09 7:51 ` [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode Biju
2026-03-09 8:17 ` [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Pavel Machek
6 siblings, 0 replies; 11+ messages in thread
From: Biju @ 2026-03-09 7:51 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
[ Upstream commit af6b427c7ad096724da7399b180dc3bb9f033322 ]
Specify the expected reset-names for the Renesas CAN-FD controller on
RZ/G2L and RZ/G3E SoCs.
The reset names rstp_n and rstc_n are defined in the SoC hardware manual
and are already used by the driver since commit 76e9353a80e9 ("can:
rcar_canfd: Add support for RZ/G2L family"). The reset-names property
existed previously but was dropped by commit 466c8ef7b66b ("dt-bindings:
can: renesas,rcar-canfd: Simplify the conditional schema").
Restore and constrain reset-names in the binding so DT schema checks
match the actual hardware requirements and driver expectations.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260114154525.3169992-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/net/can/renesas,rcar-canfd.yaml | 33 +++++++++++--------
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
index e129bdceef84..9bfd4f44e4d4 100644
--- a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
+++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
@@ -122,6 +122,11 @@ properties:
resets: true
+ reset-names:
+ items:
+ - const: rstp_n
+ - const: rstc_n
+
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
description:
@@ -195,13 +200,6 @@ allOf:
minItems: 2
maxItems: 2
- reset-names:
- minItems: 2
- maxItems: 2
-
- required:
- - reset-names
-
- if:
properties:
compatible:
@@ -239,13 +237,6 @@ allOf:
minItems: 2
maxItems: 2
- reset-names:
- minItems: 2
- maxItems: 2
-
- required:
- - reset-names
-
- if:
properties:
compatible:
@@ -299,6 +290,20 @@ allOf:
properties:
renesas,no-can-fd: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,r9a09g047-canfd
+ - renesas,rzg2l-canfd
+ then:
+ required:
+ - reset-names
+ else:
+ properties:
+ reset-names: false
+
unevaluatedProperties: false
examples:
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
` (4 preceding siblings ...)
2026-03-09 7:51 ` [PATCH 6.12.y-cip 5/6] dt-bindings: can: renesas,rcar-canfd: Specify reset-names Biju
@ 2026-03-09 7:51 ` Biju
2026-03-09 8:16 ` Pavel Machek
2026-03-09 8:17 ` [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Pavel Machek
6 siblings, 1 reply; 11+ messages in thread
From: Biju @ 2026-03-09 7:51 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar
From: Biju Das <biju.das.jz@bp.renesas.com>
[ Upstream commit 9a2b56a48c219d189366dd9bf4c2b42afde2f361 ]
The RZ/{G2L,G3E} and R-Car Gen4 SoCs support additional CAN FD mode called
FD-only mode. In this mode, communication in Classical CAN frame format is
disabled.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20251126155911.320563-3-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/can/rcar/rcar_canfd.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c
index 68e6c7ac6649..4bfc7b5ac0ae 100644
--- a/drivers/net/can/rcar/rcar_canfd.c
+++ b/drivers/net/can/rcar/rcar_canfd.c
@@ -472,6 +472,7 @@ struct rcar_canfd_global {
unsigned long channels_mask; /* Enabled channels mask */
bool extclk; /* CANFD or Ext clock */
bool fdmode; /* CAN FD or Classical CAN only mode */
+ bool fd_only_mode; /* FD-Only mode for CAN-FD */
struct reset_control *rstc1;
struct reset_control *rstc2;
const struct rcar_canfd_hw_info *info;
@@ -829,12 +830,20 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)
RCANFD_GEN4_FDCFG_FDOE);
rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
RCANFD_GEN4_FDCFG_CLOE);
+ } else if (gpriv->fd_only_mode) {
+ rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+ RCANFD_GEN4_FDCFG_CLOE);
+ rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+ RCANFD_GEN4_FDCFG_FDOE);
} else {
rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
RCANFD_GEN4_FDCFG_FDOE);
rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
RCANFD_GEN4_FDCFG_CLOE);
}
+ } else if (gpriv->fd_only_mode) {
+ rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+ RCANFD_GEN4_FDCFG_FDOE);
}
}
@@ -2141,6 +2150,9 @@ static int rcar_canfd_probe(struct platform_device *pdev)
gpriv->fdmode = fdmode;
gpriv->info = info;
+ if (of_property_read_bool(dev->of_node, "renesas,fd-only"))
+ gpriv->fd_only_mode = true; /* FD-Only mode for CAN-FD */
+
gpriv->rstc1 = devm_reset_control_get_optional_exclusive(dev, "rstp_n");
if (IS_ERR(gpriv->rstc1))
return dev_err_probe(dev, PTR_ERR(gpriv->rstc1),
@@ -2240,7 +2252,7 @@ static int rcar_canfd_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, gpriv);
dev_info(dev, "global operational state (%s clk, %s mode)\n",
gpriv->extclk ? "ext" : "canfd",
- gpriv->fdmode ? "fd" : "classical");
+ gpriv->fdmode ? (gpriv->fd_only_mode ? "fd-only" : "fd") : "classical");
return 0;
fail_channel:
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode
2026-03-09 7:51 ` [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode Biju
@ 2026-03-09 8:16 ` Pavel Machek
2026-03-09 8:29 ` [cip-dev] " Biju Das
0 siblings, 1 reply; 11+ messages in thread
From: Pavel Machek @ 2026-03-09 8:16 UTC (permalink / raw)
To: Biju; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das, Lad Prabhakar
[-- Attachment #1: Type: text/plain, Size: 1895 bytes --]
Hi!
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> [ Upstream commit 9a2b56a48c219d189366dd9bf4c2b42afde2f361 ]
>
> The RZ/{G2L,G3E} and R-Car Gen4 SoCs support additional CAN FD mode called
> FD-only mode. In this mode, communication in Classical CAN frame format is
> disabled.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Link: https://patch.msgid.link/20251126155911.320563-3-biju.das.jz@bp.renesas.com
> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> drivers/net/can/rcar/rcar_canfd.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c
> index 68e6c7ac6649..4bfc7b5ac0ae 100644
> --- a/drivers/net/can/rcar/rcar_canfd.c
> +++ b/drivers/net/can/rcar/rcar_canfd.c
> @@ -829,12 +830,20 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)
> RCANFD_GEN4_FDCFG_FDOE);
> rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> RCANFD_GEN4_FDCFG_CLOE);
> + } else if (gpriv->fd_only_mode) {
> + rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> + RCANFD_GEN4_FDCFG_CLOE);
> + rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> + RCANFD_GEN4_FDCFG_FDOE);
> } else {
> rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> RCANFD_GEN4_FDCFG_FDOE);
> rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> RCANFD_GEN4_FDCFG_CLOE);
> }
> + } else if (gpriv->fd_only_mode) {
> + rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> + RCANFD_GEN4_FDCFG_FDOE);
> }
> }
>
For the record, this part is way too confusing. Long term, it really
needs to go to separate functions... and be refactored.
Best regards,
Pavel
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^ permalink raw reply [flat|nested] 11+ messages in thread* RE: [cip-dev] [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode
2026-03-09 8:16 ` Pavel Machek
@ 2026-03-09 8:29 ` Biju Das
0 siblings, 0 replies; 11+ messages in thread
From: Biju Das @ 2026-03-09 8:29 UTC (permalink / raw)
To: pavel@nabladev.com, biju.das.au
Cc: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu,
Prabhakar Mahadev Lad
Hi Pavel,
Thanks for the feedback.
> -----Original Message-----
> From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On Behalf Of Pavel Machek via
> lists.cip-project.org
> Sent: 09 March 2026 08:17
> Subject: Re: [cip-dev] [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode
>
> Hi!
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > [ Upstream commit 9a2b56a48c219d189366dd9bf4c2b42afde2f361 ]
> >
> > The RZ/{G2L,G3E} and R-Car Gen4 SoCs support additional CAN FD mode
> > called FD-only mode. In this mode, communication in Classical CAN
> > frame format is disabled.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Link:
> > https://patch.msgid.link/20251126155911.320563-3-biju.das.jz@bp.renesa
> > s.com
> > Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > drivers/net/can/rcar/rcar_canfd.c | 14 +++++++++++++-
> > 1 file changed, 13 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/can/rcar/rcar_canfd.c
> > b/drivers/net/can/rcar/rcar_canfd.c
> > index 68e6c7ac6649..4bfc7b5ac0ae 100644
> > --- a/drivers/net/can/rcar/rcar_canfd.c
> > +++ b/drivers/net/can/rcar/rcar_canfd.c
> > @@ -829,12 +830,20 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)
> > RCANFD_GEN4_FDCFG_FDOE);
> > rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> > RCANFD_GEN4_FDCFG_CLOE);
> > + } else if (gpriv->fd_only_mode) {
> > + rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> > + RCANFD_GEN4_FDCFG_CLOE);
> > + rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> > + RCANFD_GEN4_FDCFG_FDOE);
> > } else {
> > rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> > RCANFD_GEN4_FDCFG_FDOE);
> > rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> > RCANFD_GEN4_FDCFG_CLOE);
> > }
> > + } else if (gpriv->fd_only_mode) {
> > + rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
> > + RCANFD_GEN4_FDCFG_FDOE);
> > }
> > }
> >
>
> For the record, this part is way too confusing. Long term, it really needs to go to separate
> functions... and be refactored.
OK, you mean split [1] into 3 functions?? please let me know
1) rcar_canfd_set_classical_can_mode()
2) rcar_canfd_set_canfd_mode()
3) rcar_canfd_set_canfd_only_mode()
[1]
if (gpriv->info->ch_interface_mode) {
828 /* Do not set CLOE and FDOE simultaneously */
829 if (!gpriv->fdmode) {
1) rcar_canfd_set_classical_can_mode()
830 rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
831 RCANFD_GEN4_FDCFG_FDOE);
832 rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
833 RCANFD_GEN4_FDCFG_CLOE);
834 } else if (gpriv->fd_only_mode) {
3) rcar_canfd_set_canfd_only_mode()--> set fd_only mode here and else part(!gpriv->info->ch_interface_mode)
835 rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
836 RCANFD_GEN4_FDCFG_CLOE);
837 rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
838 RCANFD_GEN4_FDCFG_FDOE);
839 } else {
2) rcar_canfd_set_canfd_mode()
840 rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
841 RCANFD_GEN4_FDCFG_FDOE);
842 rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
843 RCANFD_GEN4_FDCFG_CLOE);
844 }
845 } else if (gpriv->fd_only_mode) {
846 rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
847 RCANFD_GEN4_FDCFG_FDOE);
848 }
Cheers,
Biju
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU
2026-03-09 7:51 [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Biju
` (5 preceding siblings ...)
2026-03-09 7:51 ` [PATCH 6.12.y-cip 6/6] can: rcar_canfd: Add support for FD-Only mode Biju
@ 2026-03-09 8:17 ` Pavel Machek
2026-03-12 1:53 ` [cip-dev] " nobuhiro.iwamatsu.x90
6 siblings, 1 reply; 11+ messages in thread
From: Pavel Machek @ 2026-03-09 8:17 UTC (permalink / raw)
To: Biju; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das, Lad Prabhakar
[-- Attachment #1: Type: text/plain, Size: 405 bytes --]
Hi!
> Add suspend/resume support for RZ/G3E ICU(interrupt controller unit). Also
> add support for CAN FD-Only mode.
Should be refactored in the mainline, but that should not block the merge.
Reviewed-by: Pavel Machek <pavel@nabladev.com>
I can apply the series if it passes testing and there are no other
comments.
Best regards,
Pavel
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^ permalink raw reply [flat|nested] 11+ messages in thread* RE: [cip-dev] [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU
2026-03-09 8:17 ` [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU Pavel Machek
@ 2026-03-12 1:53 ` nobuhiro.iwamatsu.x90
0 siblings, 0 replies; 11+ messages in thread
From: nobuhiro.iwamatsu.x90 @ 2026-03-12 1:53 UTC (permalink / raw)
To: pavel, biju.das.au; +Cc: cip-dev, biju.das.jz, prabhakar.mahadev-lad.rj
Hi all,
> -----Original Message-----
> From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On Behalf Of Pavel Machek via lists.cip-project.org
> Sent: Monday, March 9, 2026 5:18 PM
> To: Biju <biju.das.au@gmail.com>
> Cc: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＤＩＴＣ○ＣＰＴ)
> <nobuhiro.iwamatsu.x90@mail.toshiba>; Pavel Machek <pavel@nabladev.com>; Biju Das
> <biju.das.jz@bp.renesas.com>; Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [cip-dev] [PATCH 6.12.y-cip 0/6] Add suspend/resume support for RZ/G3E ICU
>
> Hi!
>
> > Add suspend/resume support for RZ/G3E ICU(interrupt controller unit).
> > Also add support for CAN FD-Only mode.
>
> Should be refactored in the mainline, but that should not block the merge.
>
> Reviewed-by: Pavel Machek <pavel@nabladev.com>
>
> I can apply the series if it passes testing and there are no other comments.
I reviewed this series, looks good to me too.
I will apply and push with Pavel's Reviewed-by tag.
>
> Best regards,
> Pavel
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 11+ messages in thread