Re: [PATCH 6.12.y-cip v3 10/17] spi: rzv2h-rspi: make transfer clock rate finding chip-specific

[Pavel Machek <pavel@nabladev.com>]

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Hi!

> commit 77d931584dd38916b66c65320c80a65cbef4b122 upstream.
> 
> The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a more
> complicated clocking setup for the SPI transfer clock than RZ/V2H, as
> the clock from which it is generated supports multiple dividers.
> 
> To prepare for adding support for these SoCs, split out the logic for
> finding the SPR and BRDV for a fixed clock into
> rzv2h_rspi_find_rate_fixed(), and add and use a .find_tclk_rate()
> callback into the chip-specific structure.

> @@ -255,21 +270,49 @@ static u32 rzv2h_rspi_setup_clock(struct rzv2h_rspi_priv *rspi, u32 hz)
>  	 * * n = SPR - is RSPI_SPBR.SPR (from 0 to 255)
>  	 * * N = BRDV - is RSPI_SPCMD.BRDV (from 0 to 3)
>  	 */
> -	tclk_rate = clk_get_rate(rspi->tclk);
> +	clk_rate = clk_get_rate(clk);
>  	for (brdv = RSPI_SPCMD_BRDV_MIN; brdv <= RSPI_SPCMD_BRDV_MAX; brdv++) {
> -		spr = DIV_ROUND_UP(tclk_rate, hz * (1 << (brdv + 1)));
> +		spr = DIV_ROUND_UP(clk_rate, hz * (1 << (brdv + 1)));
>  		spr--;
> -		if (spr >= RSPI_SPBR_SPR_MIN && spr <= RSPI_SPBR_SPR_MAX)
> +		if (spr >= spr_min && spr <= spr_max)
>  			goto clock_found;
>  	}
>  
> -	return 0;
> +	return;
>  
>  clock_found:
> -	rspi->spr = spr;
> -	rspi->brdv = brdv;
> +	actual_hz = rzv2h_rspi_calc_bitrate(clk_rate, spr, brdv);
> +	error = abs((long)hz - (long)actual_hz);
>  
> -	return rzv2h_rspi_calc_bitrate(tclk_rate, spr, brdv);
> +	if (error >= best->error)
> +		return;
> +
> +	*best = (struct rzv2h_rspi_best_clock) {
> +		.clk = clk,
> +		.clk_rate = clk_rate,
> +		.error = error,
> +		.actual_hz = actual_hz,
> +		.brdv = brdv,
> +		.spr = spr,
> +	};
> +}

This is really quite strange code... looks like Rust more than C.

Filling clk, error, actual_hz, .... into temporary variable and then
just assiging it may be better.

Best regards,
								Pavel

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