public inbox for cip-dev@lists.cip-project.org
 help / color / mirror / Atom feed
From: Pavel Machek <pavel@nabladev.com>
To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Cc: cip-dev@lists.cip-project.org, pavel@nabladev.com,
	nobuhiro.iwamatsu.x90@mail.toshiba
Subject: Re: [PATCH 6.1.y-cip 0/7] Add RZ/V2N TSU support
Date: Wed, 8 Apr 2026 12:47:33 +0200	[thread overview]
Message-ID: <adYyRYcGKV-VMAAt@duo.ucw.cz> (raw)
In-Reply-To: <20260408093951.66884-1-ovidiu.panait.rb@renesas.com>

[-- Attachment #1: Type: text/plain, Size: 942 bytes --]

Hi!

> This series adds TSU support for the Renesas RZ/V2N SoC.
> 
> All patches, except for patches 4/7 and 6/7, were cherry-picked
> from mainline kernel.
> 
> The RZ/V2H binding patch (1/7) was missed during RZ/V2H TSU backporting,
> so it was added in this series.
> 
> Patch 4/7 is needed to fix asynchronous aborts during unbind. See the MSTOP
> series for more details:
> https://lore.kernel.org/cip-dev/20260115083451.1064048-1-claudiu.beznea.uj@bp.renesas.com/
> 
> Patch 6/7 is a backport specific change that is needed to allow the
> thermal driver to read calibration data from the system controller.

Aha, explanation is here, I just missed it. Sorry for noise.

Series looks okay to me.

Reviewed-by: Pavel Machek <pavel@nabladev.com>

I can apply the series if it passes testing and there are no other
comments.

Best regards,
                                                                Pavel


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]

  parent reply	other threads:[~2026-04-08 10:47 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-08  9:39 [PATCH 6.1.y-cip 0/7] Add RZ/V2N TSU support Ovidiu Panait
2026-04-08  9:39 ` [PATCH 6.1.y-cip 1/7] dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2H TSU Ovidiu Panait
2026-04-08  9:39 ` [PATCH 6.1.y-cip 2/7] dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2N TSU Ovidiu Panait
2026-04-08  9:39 ` [PATCH 6.1.y-cip 3/7] clk: renesas: r9a09g056: Add clock and reset entries for TSU Ovidiu Panait
2026-04-08  9:39 ` [PATCH 6.1.y-cip 4/7] PM: domains: Add RZ/V2N compatible to PM domain detach list Ovidiu Panait
2026-04-08 10:46   ` Pavel Machek
2026-04-08  9:39 ` [PATCH 6.1.y-cip 5/7] arm64: dts: renesas: r9a09g056: Move interrupt-parent to root node Ovidiu Panait
2026-04-08  9:39 ` [PATCH 6.1.y-cip 6/7] arm64: dts: renesas: r9a09g056: Use syscon compatible for the system controller Ovidiu Panait
2026-04-08  9:39 ` [PATCH 6.1.y-cip 7/7] arm64: dts: renesas: r9a09g056: Add TSU nodes Ovidiu Panait
2026-04-08 10:47 ` Pavel Machek [this message]
2026-04-09  4:21   ` [cip-dev] [PATCH 6.1.y-cip 0/7] Add RZ/V2N TSU support nobuhiro.iwamatsu.x90

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=adYyRYcGKV-VMAAt@duo.ucw.cz \
    --to=pavel@nabladev.com \
    --cc=cip-dev@lists.cip-project.org \
    --cc=nobuhiro.iwamatsu.x90@mail.toshiba \
    --cc=ovidiu.panait.rb@renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox