[PATCH 6.1.y-cip 5/7] clk: renesas: Use IS_ERR() for pointers that cannot be NULL

Chris Brandt
2026-04-13T17:18:43Z

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 6a636d203cc8d29ae73116bbca8b0ea2c7a90d7f upstream.

The use of IS_ERR_OR_NULL() suggests that "clk" can be a NULL pointer.
Hence smatch assumes so, and issues a "passing zero to 'PTR_ERR'"
warning.

At these checkpoints, "clk" always contains either a valid pointer, or
an error pointer (none of the functions called return NULL pointers).
Hence replace IS_ERR_OR_NULL() by IS_ERR().

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202408032025.ve2JMaoV-lkp@intel.com/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/81260328acb5c78e915ab04afad3901a31c16128.1758793709.git.geert+renesas@glider.be
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
drivers/clk/renesas/renesas-cpg-mssr.c | 2 +-
drivers/clk/renesas/rzg2l-cpg.c | 2 +-
drivers/clk/renesas/rzv2h-cpg.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 5cd3069181fd..80bfc225b31b 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -394,7 +394,7 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
break;
}

- if (IS_ERR_OR_NULL(clk))
+ if (IS_ERR(clk))
goto fail;

dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 27e1432d726a..847f5ed51dc7 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -1185,7 +1185,7 @@ rzg2l_cpg_register_core_clk(const struct cpg_core_clk *core,
goto fail;
}

- if (IS_ERR_OR_NULL(clk))
+ if (IS_ERR(clk))
goto fail;

dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c
index 5f1fcc4f4f65..2e11c0c9591a 100644
--- a/drivers/clk/renesas/rzv2h-cpg.c
+++ b/drivers/clk/renesas/rzv2h-cpg.c
@@ -1099,7 +1099,7 @@ rzv2h_cpg_register_core_clk(const struct cpg_core_clk *core,
goto fail;
}

- if (IS_ERR_OR_NULL(clk))
+ if (IS_ERR(clk))
goto fail;

dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
--
2.52.0