From: Pavel Machek <pavel@nabladev.com>
To: Biju <biju.das.au@gmail.com>
Cc: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>,
Pavel Machek <pavel@nabladev.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 6.12.y-cip 00/39] Add RZ/G3L SMARC EVK support
Date: Wed, 1 Jul 2026 12:44:05 +0200 [thread overview]
Message-ID: <akTvddty7PcGX7rx@duo.ucw.cz> (raw)
In-Reply-To: <20260630114813.92739-1-biju.das.jz@bp.renesas.com>
[-- Attachment #1: Type: text/plain, Size: 460 bytes --]
Hi!
> This patch series add minimal boot support for RZ/G3L SMARC EVK. All patches
> in this series are cherry-picked from mainline.
It was not as bad as series of 39 patches looked at first look; thanks
to simple patches.
This looks okay to me.
Reviewed-by: Pavel Machek <pavel@nabladev.com>
I can apply the series if it passes testing and there are no other
comments.
Best regards,
Pavel
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
next prev parent reply other threads:[~2026-07-01 10:44 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 11:47 [PATCH 6.12.y-cip 00/39] Add RZ/G3L SMARC EVK support Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 01/39] dt-bindings: serial: renesas,scif: Document RZ/G3L SoC Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 02/39] dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas " Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 03/39] dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L RMII{tx,rx} clocks Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 04/39] net: stmmac: platform: Group GMAC4 compatible check Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 05/39] net: stmmac: platform: Add snps,dwmac-5.30a IP compatible string Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 06/39] net: stmmac: dwmac-renesas-gbeth: Add support for RZ/G3L SoC Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 07/39] dt-bindings: soc: renesas: Document RZ/G3L SoC variants, SMARC SoM and Carrier-II EVK Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 08/39] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3L SoC Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 09/39] soc: renesas: rz-sysc: Add SoC identification for " Biju
2026-07-16 7:47 ` Pavel Machek
2026-06-30 11:47 ` [PATCH 6.12.y-cip 10/39] clk: renesas: rzg2l: Remove unneeded nullify checks Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 11/39] clk: renesas: rzg2l: Rename mstp_clock to mod_clock Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 12/39] clk: renesas: rzg2l: Simplify rzg2l_cpg_assert() and rzg2l_cpg_deassert() Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 13/39] clk: renesas: rzg2l: Re-assert reset on deassert timeout Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 14/39] clk: renesas: rzg2l: Deassert reset on assert timeout Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 15/39] clk: renesas: rzg2l: Add support for critical resets Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 16/39] clk: renesas: rzg2l: Add helper for mod clock enable/disable Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 17/39] clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper() Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 18/39] clk: renesas: rzg2l: Re-enable critical module clocks during resume Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 19/39] dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 20/39] clk: renesas: Add support for " Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 21/39] clk: renesas: rzg2l: Drop always-false check in rzg3s_cpg_pll_clk_recalc_rate() Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 22/39] clk: renesas: rzg2l: Add support for enabling PLLs Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 23/39] clk: renesas: r8a08g046: Add support for PLL6 Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 24/39] clk: renesas: r9a08g046: Add GBETH clocks and resets Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 25/39] clk: renesas: r9a08g046: Add GPIO clocks/resets Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 26/39] clk: renesas: r9a08g046: Add CA55 core clocks Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 27/39] clk: renesas: r9a08g046: Add WDT clocks and reset Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 28/39] clk: renesas: r9a08g046: Add SCIF{1..5} clocks and resets Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 29/39] clk: renesas: r9a08g046: Add I2C " Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 30/39] clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 31/39] clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS() Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 32/39] clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable() Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 33/39] arm64: dts: renesas: Add initial DTSI for RZ/G3L SoC Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 34/39] arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 35/39] arm64: dts: renesas: renesas-smarc2: Move usb3 nodes to board DTS Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 36/39] arm64: dts: renesas: Add initial device tree for RZ/G3L SMARC EVK board Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 37/39] arm64: dts: renesas: r9a08g046: Add GBETH nodes Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 38/39] arm64: dts: renesas: rzg3l-smarc-som: Enable eth0 (GBETH0) interface Biju
2026-06-30 11:47 ` [PATCH 6.12.y-cip 39/39] arm64: dts: renesas: r9a08g046: Add OPP table Biju
2026-07-01 10:44 ` Pavel Machek [this message]
2026-07-01 10:45 ` [PATCH 6.12.y-cip 00/39] Add RZ/G3L SMARC EVK support Pavel Machek
2026-07-01 10:49 ` Biju Das
2026-07-02 7:43 ` nobuhiro.iwamatsu.x90
2026-07-02 7:50 ` [cip-dev] " Pavel Machek
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=akTvddty7PcGX7rx@duo.ucw.cz \
--to=pavel@nabladev.com \
--cc=biju.das.au@gmail.com \
--cc=biju.das.jz@bp.renesas.com \
--cc=cip-dev@lists.cip-project.org \
--cc=nobuhiro.iwamatsu.x90@mail.toshiba \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox