RE: [PATCH] 3/3 Dynamic cpufreq governor and updates to ACPIP-state driver

[Carl Thompson <cet@carlthompson.net>]

Quoting "Nakajima, Jun" <jun.nakajima@intel.com>:

> ...

> It's about the frequency of the feedback loop. As we have much lower
> latency with P-state transitions, the sampling time can be order of
> millisecond (or shorter if meaningful). A userland daemon can have a
> high-level policy (preferences, or set of parameters), but it cannot be
> part of the real feedback loop. If we combine P-state transitions and
> deeper C-state transitions, the situation is worse with a userland
> daemon.

You are making the assumption that a higher polling frequency (we'll say
1ms) is in general better than a lower frequency (we'll say 1s).  I submit
that it is not.

If I hit a key on my keyboard and your high frequency loop increases CPU
speed so that my word processor displays the letter 0.01s faster, is that
really beneficial?  If a window renders in 0.2s seconds instead of 0.3s is
that a difference I am going to notice?

On the other hand, if I do a kernel compile and it is done 0.999s faster
with the higher frequency loop, am I going to miss that second over such a
long duration?  (In reality, the compile with the high-frequency loop would
probably take longer unless it has near zero overhead).

In my opinion it is wasteful to increase CPU speed unless there is a longer
term need for it.

> 	Jun

Carl Thompson