Re: p4_clockmod or speedstep_ich | acpi?

[Dominik Brodowski <linux@dominikbrodowski.de>]

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On Tue, Jan 27, 2004 at 12:41:44AM -0200, Marcus Grando wrote:
> Hi,
> 
> But why my kernel show this messages, if celeron not support speedstep-ich?
> 
> cpufreq: P4/Xeon(TM) CPU On-Demand Clock Modulation available
> cpufreq: Warning: Pentium 4-M detected. The speedstep-ich or acpi cpufreq
> cpufreq: modules offers voltage scaling in addition of frequency 
> scaling. You
> cpufreq: should use either one instead of p4-clockmod, if possible.
> 
> Regards
> 
> Ducrot Bruno wrote:
> >On Sat, Jan 24, 2004 at 01:53:57AM -0200, Marcus Grando wrote:
> >
> >>Hi,
> >>
> >>I have a toshiba satellite a10 127, and use p4 clockmod in cpufreq. I 
> >>look this kernel messages:
> >>
> >>cpufreq: P4/Xeon(TM) CPU On-Demand Clock Modulation available
> >>cpufreq: Warning: Pentium 4-M detected. The speedstep-ich or acpi cpufreq
> >>cpufreq: modules offers voltage scaling in addition of frequency 
> >>scaling. You
> >>cpufreq: should use either one instead of p4-clockmod, if possible.
> >>
> >
> >
> >...
> >
> >>CPU:     After generic identify, caps: bfebf9ff 00000000 00000000 00000000
> >>CPU:     After vendor identify, caps: bfebf9ff 00000000 00000000 00000000
> >>CPU: Trace cache: 12K uops, L1 D cache: 8K
> >>CPU: L2 cache: 256K
> >>CPU:     After all inits, caps: bfebf9ff 00000000 00000000 00000080
> >>CPU: Intel Mobile Intel(R) Celeron(R) CPU 2.00GHz stepping 09
> >
> >                             ^^^^^^^
> >		  A celeron is not speedstep capable.
> >

Could you try out this patch, please?

	Dominik

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diff -ruN linux-original/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c linux/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
--- linux-original/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c	2004-01-16 20:30:36.000000000 +0100
+++ linux/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c	2004-01-28 23:32:49.637733272 +0100
@@ -184,17 +184,55 @@
 		if (c->x86_model != 2)
 			return 0;
 
-		if ((c->x86_mask != 4) && /* B-stepping [M-P4-M] */
-			(c->x86_mask != 7) && /* C-stepping [M-P4-M] */
-			(c->x86_mask != 9))   /* D-stepping [M-P4-M or M-P4/533] */
-			return 0;
-
 		ebx = cpuid_ebx(0x00000001);
 		ebx &= 0x000000FF;
-		if ((ebx != 0x0e) && (ebx != 0x0f))
-			return 0;
 
-		return SPEEDSTEP_PROCESSOR_P4M;
+		dprintk(KERN_INFO "ebx value is %x, x86_mask is %x\n", ebx, c->86_mask);
+
+		switch (c->x86_mask) {
+		case 4: 
+			/*
+			 * B-stepping [M-P4-M] 
+			 * sample has ebx = 0x0f, production has 0x0e.
+			 */
+			if ((ebx == 0x0e) || (ebx == 0x0f))
+				return SPEEDSTEP_PROCESSOR_P4M;
+			break;
+		case 7: 
+			/*
+			 * C-stepping [M-P4-M]
+			 * needs to have ebx=0x0e, else it's a celeron:
+			 * cf. 25130917.pdf / page 7, footnote 5 even
+			 * though 25072120.pdf / page 7 doesn't say
+			 * samples are only of B-stepping...
+			 */
+			if (ebx == 0x0e)
+				return SPEEDSTEP_PROCESSOR_P4M;
+			break;
+		case 9:
+			/*
+			 * D-stepping [M-P4-M or M-P4/533]
+			 *
+			 * this is totally strange: CPUID 0x0F29 is
+			 * used by M-P4-M, M-P4/533 and(!) Celeron CPUs.
+			 * The latter need to be sorted out as they don't
+			 * support speedstep.
+			 * Celerons with CPUID 0x0F29 may have either
+			 * ebx=0x8 or 0xf -- 25130917.pdf doesn't say anything
+			 * specific.
+			 * M-P4-Ms may have either ebx=0xe or 0xf [see above]
+			 * M-P4/533 have either ebx=0xe or 0xf. [25317607.pdf]
+			 * So, how to distinguish all those processors with
+			 * ebx=0xf? I don't know. Sort them out, and wait
+			 * whether someone complains.
+			 */
+			if (ebx == 0x0e)
+				return SPEEDSTEP_PROCESSOR_P4M;
+			break;
+		default:
+			break;
+		}
+		return 0;
 	}
 
 	switch (c->x86_model) {

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