DMA Engine development
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From: Vinod Koul <vkoul@kernel.org>
To: Frank Li <Frank.Li@kernel.org>,
	Michal Simek <michal.simek@amd.com>,
	 Kedareswara rao Appana <appana.durga.rao@xilinx.com>,
	 Alex Bereza <alex@bereza.email>
Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] dmaengine: xilinx_dma: Fix hardware buffer descriptor chain after cyclic DMA
Date: Thu, 10 Sep 2026 19:36:59 +0530	[thread overview]
Message-ID: <178904921939.109109.4260321202940337828.b4-ty@kernel.org> (raw)
In-Reply-To: <20260818-fix-hw-buf-desc-after-cyclic-mode-v2-1-530ff44c6a81@bereza.email>


On Tue, 18 Aug 2026 09:36:29 +0200, Alex Bereza wrote:
> Using the DMA in cyclic mode modifies the hardware buffer descriptor
> chain in xilinx_dma_prep_dma_cyclic so that the last descriptor used by
> the cyclic transfer points back to the first descriptor, but it never
> restores the original descriptor ring. This breaks using non-cyclic mode
> after cyclic mode with an error like:
> 
>   xilinx-vdma 86000000.dma: Channel 00000000354d5c8d has errors 100, cdr 6de40000 tdr 6de40400
> 
> [...]

Applied, thanks!

[1/1] dmaengine: xilinx_dma: Fix hardware buffer descriptor chain after cyclic DMA
      commit: 7ed1e3070c9b4bbd67d5519e14711038dd53ab13

Best regards,
-- 
~Vinod



      parent reply	other threads:[~2026-09-10 14:07 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-18  7:36 [PATCH v2] dmaengine: xilinx_dma: Fix hardware buffer descriptor chain after cyclic DMA Alex Bereza
2026-08-18  7:55 ` sashiko-bot
2026-08-23 11:13 ` Gupta, Suraj
2026-08-24 15:19 ` Frank Li
2026-09-10 14:06 ` Vinod Koul [this message]

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