[PATCH v4 00/17] Renesas: dmaengine and ASoC fixes

Claudiu
2026-04-11T11:43:09Z

Hi,

This series addresses issues identified in the DMA engine and RZ SSI
drivers.

As described in the patch "dmaengine: sh: rz-dmac: Set the Link End (LE)
bit on the last descriptor", stress testing on the Renesas RZ/G2L SoC
showed that starting all available DMA channels could cause the system
to stall after several hours of operation. This issue was resolved by
setting the Link End bit on the last descriptor of a DMA transfer.

However, after applying that fix, the SSI audio driver began to suffer
from frequent overruns and underruns. This was caused by the way the SSI
driver emulated cyclic DMA transfers: at the start of playback/capture
it initially enqueued 4 DMA descriptors as single SG transfers, and upon
completion of each descriptor, a new one was enqueued. Since there was
no indication to the DMA hardware where the descriptor list ended
(though the LE bit), the DMA engine continued transferring until the
audio stream was stopped. From time to time, audio signal spikes were
observed in the recorded file with this approach.

To address these issue, cyclic DMA support was added to the DMA engine
driver, and the SSI audio driver was reworked to use this support via
the generic PCM dmaengine APIs.

Due to the behavior described above, no Fixes tags were added to the
patches in this series, and all patches should be merged through the
same tree.

In case this series will be merged this release cycle, best would
be to go though the DMA tree as the DMA changes are based on the series
at [1] which was merged on March 17th. Otherwise, any of the ASoC or DMA
tree should be good.

Thank you,
Claudiu

Changes in v4:
- collected tags
- addressed review comments got from sashiko.dev. For this:
- added patches:
-- dmaengine: sh: rz-dmac: Move interrupt request after everything is set up
-- dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry()

Changes in v3:
- addressed review comments got from sashiko.dev. For this:
- added patches 1-9
- added patch "ASoC: renesas: rz-ssi: Add pause support"
- dropped patches:
-- dmaengine: sh: rz-dmac: Add enable status bit
-- dmaengine: sh: rz-dmac: Add pause status bit

Changes in v2:
- fixed typos in patch descriptions and patch titles
- updated "ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs"
to fix the PIO mode
- in patch "dmaengine: sh: rz-dmac: Add suspend to RAM support"
clear the RZ_DMAC_CHAN_STATUS_SYS_SUSPENDED status bit for
channel w/o RZ_DMAC_CHAN_STATUS_PAUSED_INTERNAL
- per-patch updates can be found in individual patches changelog
- rebased on top of next-20260319
- updated the cover letter

[1] https://lore.kernel.org/all/20260316133252.240348-1-claudiu.beznea.uj@bp.renesas.com/

Claudiu Beznea (17):
dmaengine: sh: rz-dmac: Move interrupt request after everything is set
up
dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry()
dmaengine: sh: rz-dmac: Use list_first_entry_or_null()
dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()
dmaengine: sh: rz-dmac: Do not disable the channel on error
dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address
dmaengine: sh: rz-dmac: Save the start LM descriptor
dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled
dmaengine: sh: rz-dmac: Add helper to check if the channel is paused
dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor
processing
dmaengine: sh: rz-dmac: Refactor pause/resume code
dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with
CHCTRL_SETEN
dmaengine: sh: rz-dmac: Add cyclic DMA support
dmaengine: sh: rz-dmac: Add suspend to RAM support
ASoC: renesas: rz-ssi: Add pause support
ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs
dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last
descriptor

drivers/dma/sh/rz-dmac.c | 762 +++++++++++++++++++++++++------------
sound/soc/renesas/Kconfig | 1 +
sound/soc/renesas/rz-ssi.c | 388 +++++++------------
3 files changed, 652 insertions(+), 499 deletions(-)

--
2.43.0