* [LINUX,2/4] dmaengine: xilinx_dma: Fix race condition in the driver for cdma
@ 2017-12-21 10:11 Kedareswara rao Appana
0 siblings, 0 replies; 3+ messages in thread
From: Kedareswara rao Appana @ 2017-12-21 10:11 UTC (permalink / raw)
To: dan.j.williams, vinod.koul, michal.simek, appanad, lars,
akinobu.mita, joabreu, mike.looijmans, kedare06
Cc: dmaengine, linux-arm-kernel, linux-kernel
when hardware is idle we need to toggle the SG bit
in the control register, inorder to update new value to the
current descriptor register other wise undefined
results will occur.
This patch updates the same.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
---
drivers/dma/xilinx/xilinx_dma.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 21ac954..8467671 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1204,6 +1204,12 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
}
if (chan->has_sg) {
+ dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,
+ XILINX_CDMA_CR_SGMODE);
+
+ dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,
+ XILINX_CDMA_CR_SGMODE);
+
xilinx_write(chan, XILINX_DMA_REG_CURDESC,
head_desc->async_tx.phys);
@@ -2052,6 +2058,10 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
chan->cyclic = false;
}
+ if ((chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) && chan->has_sg)
+ dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,
+ XILINX_CDMA_CR_SGMODE);
+
return 0;
}
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [LINUX,2/4] dmaengine: xilinx_dma: Fix race condition in the driver for cdma
@ 2018-01-03 3:58 Vinod Koul
0 siblings, 0 replies; 3+ messages in thread
From: Vinod Koul @ 2018-01-03 3:58 UTC (permalink / raw)
To: Kedareswara rao Appana
Cc: dan.j.williams, michal.simek, appanad, lars, akinobu.mita,
joabreu, mike.looijmans, kedare06, dmaengine, linux-arm-kernel,
linux-kernel
On Thu, Dec 21, 2017 at 03:41:36PM +0530, Kedareswara rao Appana wrote:
same issue for patch title here too
> when hardware is idle we need to toggle the SG bit
> in the control register, inorder to update new value to the
> current descriptor register other wise undefined
> results will occur.
can you try making it bit more clear..
>
> This patch updates the same.
>
> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> ---
> drivers/dma/xilinx/xilinx_dma.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index 21ac954..8467671 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -1204,6 +1204,12 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
> }
>
> if (chan->has_sg) {
> + dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,
> + XILINX_CDMA_CR_SGMODE);
> +
> + dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,
> + XILINX_CDMA_CR_SGMODE);
> +
> xilinx_write(chan, XILINX_DMA_REG_CURDESC,
> head_desc->async_tx.phys);
>
> @@ -2052,6 +2058,10 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
> chan->cyclic = false;
> }
>
> + if ((chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) && chan->has_sg)
> + dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,
> + XILINX_CDMA_CR_SGMODE);
> +
> return 0;
> }
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [LINUX,2/4] dmaengine: xilinx_dma: Fix race condition in the driver for cdma
@ 2018-01-03 5:10 Appana Durga Kedareswara Rao
0 siblings, 0 replies; 3+ messages in thread
From: Appana Durga Kedareswara Rao @ 2018-01-03 5:10 UTC (permalink / raw)
To: Vinod Koul
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
lars@metafoo.de, akinobu.mita@gmail.com, joabreu@synopsys.com,
mike.looijmans@topic.nl, kedare06@gmail.com,
dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Hi Vinod,
Thanks for the review...
>
>On Thu, Dec 21, 2017 at 03:41:36PM +0530, Kedareswara rao Appana wrote:
>
>same issue for patch title here too
Ok will fix in v2...
>
>> when hardware is idle we need to toggle the SG bit in the control
>> register, inorder to update new value to the current descriptor
>> register other wise undefined results will occur.
>
>can you try making it bit more clear..
Sure will fix in v2...
Regards,
Kedar.
>
>>
>> This patch updates the same.
>>
>> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
>> ---
>> drivers/dma/xilinx/xilinx_dma.c | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/dma/xilinx/xilinx_dma.c
>> b/drivers/dma/xilinx/xilinx_dma.c index 21ac954..8467671 100644
>> --- a/drivers/dma/xilinx/xilinx_dma.c
>> +++ b/drivers/dma/xilinx/xilinx_dma.c
>> @@ -1204,6 +1204,12 @@ static void xilinx_cdma_start_transfer(struct
>xilinx_dma_chan *chan)
>> }
>>
>> if (chan->has_sg) {
>> + dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,
>> + XILINX_CDMA_CR_SGMODE);
>> +
>> + dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,
>> + XILINX_CDMA_CR_SGMODE);
>> +
>> xilinx_write(chan, XILINX_DMA_REG_CURDESC,
>> head_desc->async_tx.phys);
>>
>> @@ -2052,6 +2058,10 @@ static int xilinx_dma_terminate_all(struct dma_chan
>*dchan)
>> chan->cyclic = false;
>> }
>>
>> + if ((chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) &&
>chan->has_sg)
>> + dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,
>> + XILINX_CDMA_CR_SGMODE);
>> +
>> return 0;
>> }
>>
>> --
>> 2.7.4
>>
>
>--
>~Vinod
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