From: Vinod Koul <vkoul@kernel.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: vinod.koul@intel.com, dmaengine@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
Date: Tue, 10 Jul 2018 20:50:43 +0530 [thread overview]
Message-ID: <20180710152043.GC3219@vkoul-mobl> (raw)
On 02-07-18, 18:18, Yoshihiro Shimoda wrote:
> This patch fixes an issue that unexpected retransfering happens
> if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
> the CHCR register. For example, sh-sci driver can reproduce this
> issue like below:
>
> In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
> dmaengine_tx_status()
> rcar_dmac_tx_status()
> rcar_dmac_chan_get_residue()
> rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */
>
> According to the description of commit 73a47bd0da66 ("dmaengine:
> rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
> will be transferred if CHCR::DE bit was cleared". So, this patch
> doesn't need to check TCRB register.
>
> Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> This patch is based on the latest slave-dma / fixes branch.
>
> This issue can be reproduced by the following commands on r8a7795
> Salvator-XS and Windows Teraterm :) :
> # stty 921600
> (Change Teraterm baud rate)
> # cat > rx.txt
> (Send 5MiB file by Teraterm. After a few minutes later, we cannot
> input any commands by the serial console.)
Applied after fixing subsystem name
next reply other threads:[~2018-07-10 15:20 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-10 15:20 Vinod Koul [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-07-13 9:22 dma: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0 Geert Uytterhoeven
2018-07-09 17:23 Vinod Koul
2018-07-02 9:18 Yoshihiro Shimoda
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