* [v4,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
@ 2018-08-02 14:10 Andrea Merello
0 siblings, 0 replies; 5+ messages in thread
From: Andrea Merello @ 2018-08-02 14:10 UTC (permalink / raw)
To: vkoul, dan.j.williams, michal.simek, appana.durga.rao, dmaengine
Cc: v4-000linux-arm-kernel, linux-kernel, robh+dt, mark.rutland,
devicetree, radhey.shyam.pandey, Andrea Merello
The width of the "length register" cannot be autodetected, and it is now
specified with a DT property. Add DOC for it.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
---
Changes in v2:
- change property name
- property is now optional
- cc DT maintainer
Changes in v3:
- reword
- cc DT maintainerS and ML
Changes in v4:
- specify the unit, the valid range and the default value
---
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index a2b8bfaec43c..aec4a41a03ae 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
@@ -41,6 +41,10 @@ Optional properties:
- xlnx,include-sg: Tells configured for Scatter-mode in
the hardware.
Optional properties for AXI DMA:
+- xlnx,sg-length-width: Should be set to the width in bits of the length
+ register as configured in h/w. Takes values {8...26}. If the property
+ is missing or invalid then the default value 23 is used. This is the
+ maximum value that is supported by all IP versions.
- xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
Optional properties for VDMA:
- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [v4,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
@ 2018-08-07 14:56 Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2018-08-07 14:56 UTC (permalink / raw)
To: Andrea Merello
Cc: vkoul, dan.j.williams, michal.simek, appana.durga.rao, dmaengine,
v4-000linux-arm-kernel, linux-kernel, mark.rutland, devicetree,
radhey.shyam.pandey
On Thu, Aug 02, 2018 at 04:10:08PM +0200, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add DOC for it.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
> Changes in v2:
> - change property name
> - property is now optional
> - cc DT maintainer
> Changes in v3:
> - reword
> - cc DT maintainerS and ML
> Changes in v4:
> - specify the unit, the valid range and the default value
> ---
> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> index a2b8bfaec43c..aec4a41a03ae 100644
> --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> @@ -41,6 +41,10 @@ Optional properties:
> - xlnx,include-sg: Tells configured for Scatter-mode in
> the hardware.
> Optional properties for AXI DMA:
> +- xlnx,sg-length-width: Should be set to the width in bits of the length
> + register as configured in h/w. Takes values {8...26}. If the property
> + is missing or invalid then the default value 23 is used. This is the
> + maximum value that is supported by all IP versions.
If 23 is the max, then why is the range 8-26?
---
To unsubscribe from this list: send the line "unsubscribe dmaengine" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 5+ messages in thread
* [v4,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
@ 2018-08-09 6:36 Andrea Merello
0 siblings, 0 replies; 5+ messages in thread
From: Andrea Merello @ 2018-08-09 6:36 UTC (permalink / raw)
To: Rob Herring
Cc: Vinod, dan.j.williams, michal.simek, appana.durga.rao, dmaengine,
v4-000linux-arm-kernel, linux-kernel, Mark Rutland, devicetree,
Radhey Shyam Pandey
On Tue, Aug 7, 2018 at 4:56 PM, Rob Herring <robh@kernel.org> wrote:
> On Thu, Aug 02, 2018 at 04:10:08PM +0200, Andrea Merello wrote:
>> The width of the "length register" cannot be autodetected, and it is now
>> specified with a DT property. Add DOC for it.
>>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: devicetree@vger.kernel.org
>> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
>> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>> ---
>> Changes in v2:
>> - change property name
>> - property is now optional
>> - cc DT maintainer
>> Changes in v3:
>> - reword
>> - cc DT maintainerS and ML
>> Changes in v4:
>> - specify the unit, the valid range and the default value
>> ---
>> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
>> index a2b8bfaec43c..aec4a41a03ae 100644
>> --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
>> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
>> @@ -41,6 +41,10 @@ Optional properties:
>> - xlnx,include-sg: Tells configured for Scatter-mode in
>> the hardware.
>> Optional properties for AXI DMA:
>> +- xlnx,sg-length-width: Should be set to the width in bits of the length
>> + register as configured in h/w. Takes values {8...26}. If the property
>> + is missing or invalid then the default value 23 is used. This is the
>> + maximum value that is supported by all IP versions.
>
> If 23 is the max, then why is the range 8-26?
26 In the max possible value and it is supported by some HW IP flavours.
23 is the max value supported by ALL HW IP flavours
---
To unsubscribe from this list: send the line "unsubscribe dmaengine" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 5+ messages in thread
* [v4,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
@ 2018-08-27 5:31 Vinod Koul
0 siblings, 0 replies; 5+ messages in thread
From: Vinod Koul @ 2018-08-27 5:31 UTC (permalink / raw)
To: Andrea Merello
Cc: dan.j.williams, michal.simek, appana.durga.rao, dmaengine,
v4-000linux-arm-kernel, linux-kernel, robh+dt, mark.rutland,
devicetree, radhey.shyam.pandey
On 02-08-18, 16:10, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add DOC for it.
Add Documentation for it...
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
> Changes in v2:
> - change property name
> - property is now optional
> - cc DT maintainer
> Changes in v3:
> - reword
> - cc DT maintainerS and ML
> Changes in v4:
> - specify the unit, the valid range and the default value
> ---
> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> index a2b8bfaec43c..aec4a41a03ae 100644
> --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> @@ -41,6 +41,10 @@ Optional properties:
> - xlnx,include-sg: Tells configured for Scatter-mode in
> the hardware.
> Optional properties for AXI DMA:
> +- xlnx,sg-length-width: Should be set to the width in bits of the length
> + register as configured in h/w. Takes values {8...26}. If the property
> + is missing or invalid then the default value 23 is used. This is the
> + maximum value that is supported by all IP versions.
> - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
> Optional properties for VDMA:
> - xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
> --
> 2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [v4,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
@ 2018-08-29 8:14 Andrea Merello
0 siblings, 0 replies; 5+ messages in thread
From: Andrea Merello @ 2018-08-29 8:14 UTC (permalink / raw)
To: Vinod
Cc: dan.j.williams, michal.simek, appana.durga.rao, dmaengine,
linux-kernel, Rob Herring, Mark Rutland, devicetree,
Radhey Shyam Pandey
On Mon, Aug 27, 2018 at 7:31 AM Vinod <vkoul@kernel.org> wrote:
>
> On 02-08-18, 16:10, Andrea Merello wrote:
> > The width of the "length register" cannot be autodetected, and it is now
> > specified with a DT property. Add DOC for it.
>
> Add Documentation for it...
OK
> >
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: devicetree@vger.kernel.org
> > Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> > Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> > Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> > ---
> > Changes in v2:
> > - change property name
> > - property is now optional
> > - cc DT maintainer
> > Changes in v3:
> > - reword
> > - cc DT maintainerS and ML
> > Changes in v4:
> > - specify the unit, the valid range and the default value
> > ---
> > Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> > index a2b8bfaec43c..aec4a41a03ae 100644
> > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> > @@ -41,6 +41,10 @@ Optional properties:
> > - xlnx,include-sg: Tells configured for Scatter-mode in
> > the hardware.
> > Optional properties for AXI DMA:
> > +- xlnx,sg-length-width: Should be set to the width in bits of the length
> > + register as configured in h/w. Takes values {8...26}. If the property
> > + is missing or invalid then the default value 23 is used. This is the
> > + maximum value that is supported by all IP versions.
> > - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
> > Optional properties for VDMA:
> > - xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
> > --
> > 2.17.1
>
> --
> ~Vinod
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-08-29 8:14 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-08-02 14:10 [v4,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Andrea Merello
-- strict thread matches above, loose matches on Subject: below --
2018-08-07 14:56 Rob Herring
2018-08-09 6:36 Andrea Merello
2018-08-27 5:31 Vinod Koul
2018-08-29 8:14 Andrea Merello
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).