From: Vinod Koul <vkoul@kernel.org>
To: Radhey Shyam Pandey <radheys@xilinx.com>
Cc: "dan.j.williams@intel.com" <dan.j.williams@intel.com>,
Michal Simek <michals@xilinx.com>,
Appana Durga Kedareswara Rao <appanad@xilinx.com>,
"lars@metafoo.de" <lars@metafoo.de>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer
Date: Tue, 11 Sep 2018 13:11:22 +0530 [thread overview]
Message-ID: <20180911074122.GM2634@vkoul-mobl> (raw)
On 07-09-18, 12:08, Radhey Shyam Pandey wrote:
> > > Yeah that part was clear but the implementation can be better..
> I thought over it and it seems having a new interface dma_ctrl_write_64
> taking lsb and msb bits input looks better and scalable. It will be similar
> to existing vdma_desc_write_64 impl. I will send v2 if it looks ok.
Yes that is much better, btw why not reuse same routine as common xilinx
lib functions :)
next reply other threads:[~2018-09-11 7:41 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-11 7:41 Vinod Koul [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-09-11 9:31 [3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer Radhey Shyam Pandey
2018-09-07 12:08 Radhey Shyam Pandey
2018-08-29 17:05 Radhey Shyam Pandey
2018-08-29 4:01 Vinod Koul
2018-08-28 14:03 Radhey Shyam Pandey
2018-08-21 15:55 Vinod Koul
2018-07-27 10:50 Radhey Shyam Pandey
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