From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [2/6] dmaengine: sun6i: Add a quirk for additional mbus clock From: =?utf-8?q?Jernej_=C5=A0krabec?= Message-Id: <20190307165829.9086-3-jernej.skrabec@siol.net> Date: Thu, 7 Mar 2019 17:58:25 +0100 To: maxime.ripard@bootlin.com, wens@csie.org Cc: vkoul@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, dan.j.williams@intel.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, jernej.skrabec@siol.net List-ID: SDYgRE1BIGNvbnRyb2xsZXIgbmVlZHMgYWRkaXRpb25hbCBtYnVzIGNsb2NrIHRvIGJlIGVuYWJs ZWQuCgpBZGQgYSBxdWlyayBmb3IgaXQgYW5kIGhhbmRsZSBpdCBhY2NvcmRpbmdseS4KClNpZ25l ZC1vZmYtYnk6IEplcm5laiBTa3JhYmVjIDxqZXJuZWouc2tyYWJlY0BzaW9sLm5ldD4KLS0tCiBk cml2ZXJzL2RtYS9zdW42aS1kbWEuYyB8IDIzICsrKysrKysrKysrKysrKysrKysrKystCiAxIGZp bGUgY2hhbmdlZCwgMjIgaW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQoKZGlmZiAtLWdpdCBh L2RyaXZlcnMvZG1hL3N1bjZpLWRtYS5jIGIvZHJpdmVycy9kbWEvc3VuNmktZG1hLmMKaW5kZXgg MGNkMTNmMTdmYzExLi43NjE1NTUwODAzMjUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZG1hL3N1bjZp LWRtYS5jCisrKyBiL2RyaXZlcnMvZG1hL3N1bjZpLWRtYS5jCkBAIC0xMjksNiArMTI5LDcgQEAg c3RydWN0IHN1bjZpX2RtYV9jb25maWcgewogCXUzMiBkc3RfYnVyc3RfbGVuZ3RoczsKIAl1MzIg c3JjX2FkZHJfd2lkdGhzOwogCXUzMiBkc3RfYWRkcl93aWR0aHM7CisJYm9vbCBtYnVzX2NsazsK IH07CiAKIC8qCkBAIC0xODIsNiArMTgzLDcgQEAgc3RydWN0IHN1bjZpX2RtYV9kZXYgewogCXN0 cnVjdCBkbWFfZGV2aWNlCXNsYXZlOwogCXZvaWQgX19pb21lbQkJKmJhc2U7CiAJc3RydWN0IGNs awkJKmNsazsKKwlzdHJ1Y3QgY2xrCQkqY2xrX21idXM7CiAJaW50CQkJaXJxOwogCXNwaW5sb2Nr X3QJCWxvY2s7CiAJc3RydWN0IHJlc2V0X2NvbnRyb2wJKnJzdGM7CkBAIC0xMjA4LDYgKzEyMTAs MTQgQEAgc3RhdGljIGludCBzdW42aV9kbWFfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAq cGRldikKIAkJcmV0dXJuIFBUUl9FUlIoc2RjLT5jbGspOwogCX0KIAorCWlmIChzZGMtPmNmZy0+ bWJ1c19jbGspIHsKKwkJc2RjLT5jbGtfbWJ1cyA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAi bWJ1cyIpOworCQlpZiAoSVNfRVJSKHNkYy0+Y2xrX21idXMpKSB7CisJCQlkZXZfZXJyKCZwZGV2 LT5kZXYsICJObyBtYnVzIGNsb2NrIHNwZWNpZmllZFxuIik7CisJCQlyZXR1cm4gUFRSX0VSUihz ZGMtPmNsa19tYnVzKTsKKwkJfQorCX0KKwogCXNkYy0+cnN0YyA9IGRldm1fcmVzZXRfY29udHJv bF9nZXQoJnBkZXYtPmRldiwgTlVMTCk7CiAJaWYgKElTX0VSUihzZGMtPnJzdGMpKSB7CiAJCWRl dl9lcnIoJnBkZXYtPmRldiwgIk5vIHJlc2V0IGNvbnRyb2xsZXIgc3BlY2lmaWVkXG4iKTsKQEAg LTEzMTIsMTEgKzEzMjIsMTkgQEAgc3RhdGljIGludCBzdW42aV9kbWFfcHJvYmUoc3RydWN0IHBs YXRmb3JtX2RldmljZSAqcGRldikKIAkJZ290byBlcnJfcmVzZXRfYXNzZXJ0OwogCX0KIAorCWlm IChzZGMtPmNmZy0+bWJ1c19jbGspIHsKKwkJcmV0ID0gY2xrX3ByZXBhcmVfZW5hYmxlKHNkYy0+ Y2xrX21idXMpOworCQlpZiAocmV0KSB7CisJCQlkZXZfZXJyKCZwZGV2LT5kZXYsICJDb3VsZG4n dCBlbmFibGUgbWJ1cyBjbG9ja1xuIik7CisJCQlnb3RvIGVycl9jbGtfZGlzYWJsZTsKKwkJfQor CX0KKwogCXJldCA9IGRldm1fcmVxdWVzdF9pcnEoJnBkZXYtPmRldiwgc2RjLT5pcnEsIHN1bjZp X2RtYV9pbnRlcnJ1cHQsIDAsCiAJCQkgICAgICAgZGV2X25hbWUoJnBkZXYtPmRldiksIHNkYyk7 CiAJaWYgKHJldCkgewogCQlkZXZfZXJyKCZwZGV2LT5kZXYsICJDYW5ub3QgcmVxdWVzdCBJUlFc biIpOwotCQlnb3RvIGVycl9jbGtfZGlzYWJsZTsKKwkJZ290byBlcnJfbWJ1c19jbGtfZGlzYWJs ZTsKIAl9CiAKIAlyZXQgPSBkbWFfYXN5bmNfZGV2aWNlX3JlZ2lzdGVyKCZzZGMtPnNsYXZlKTsK QEAgLTEzNDEsNiArMTM1OSw4IEBAIHN0YXRpYyBpbnQgc3VuNmlfZG1hX3Byb2JlKHN0cnVjdCBw bGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJZG1hX2FzeW5jX2RldmljZV91bnJlZ2lzdGVyKCZzZGMt PnNsYXZlKTsKIGVycl9pcnFfZGlzYWJsZToKIAlzdW42aV9raWxsX3Rhc2tsZXQoc2RjKTsKK2Vy cl9tYnVzX2Nsa19kaXNhYmxlOgorCWNsa19kaXNhYmxlX3VucHJlcGFyZShzZGMtPmNsa19tYnVz KTsKIGVycl9jbGtfZGlzYWJsZToKIAljbGtfZGlzYWJsZV91bnByZXBhcmUoc2RjLT5jbGspOwog ZXJyX3Jlc2V0X2Fzc2VydDoKQEAgLTEzNTksNiArMTM3OSw3IEBAIHN0YXRpYyBpbnQgc3VuNmlf ZG1hX3JlbW92ZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCiAJc3VuNmlfa2lsbF90 YXNrbGV0KHNkYyk7CiAKKwljbGtfZGlzYWJsZV91bnByZXBhcmUoc2RjLT5jbGtfbWJ1cyk7CiAJ Y2xrX2Rpc2FibGVfdW5wcmVwYXJlKHNkYy0+Y2xrKTsKIAlyZXNldF9jb250cm9sX2Fzc2VydChz ZGMtPnJzdGMpOwogCg==