DMA Engine development
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From: Angus Ainslie <angus@akkea.ca>
To: angus@akkea.ca
Cc: "Rob Herring" <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	"NXP Linux Team" <linux-imx@nxp.com>,
	"Dan Williams" <dan.j.williams@intel.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Carlo Caione" <ccaione@baylibre.com>,
	"Daniel Baluta" <daniel.baluta@nxp.com>,
	"Guido Günther" <agx@sigxcpu.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org
Subject: [4/4] arm64: dts: imx8mq: Change ahb clock for imx8mq
Date: Thu, 28 Mar 2019 06:38:28 -0700	[thread overview]
Message-ID: <20190328133828.20999-5-angus@akkea.ca> (raw)

Set ahb clock on sdma1 to get rid of "Timeout waiting for CH0"
on the imx8mq.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 07099f82965e..cd0f9eed9e9c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -724,7 +724,7 @@
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
-					 <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+					 <&clk IMX8MQ_CLK_AHB>;
 				clock-names = "ipg", "ahb";
 				#dma-cells = <3>;
 				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";

                 reply	other threads:[~2019-03-28 13:38 UTC|newest]

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