From: Vinod Koul <vkoul@kernel.org>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Dan Williams <dan.j.williams@intel.com>,
od@zcrc.me, dmaengine@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dmaengine: jz4780: Fix transfers being ACKed too soon
Date: Tue, 21 May 2019 10:00:09 +0530 [thread overview]
Message-ID: <20190521043009.GK15118@vkoul-mobl> (raw)
In-Reply-To: <20190504213757.6693-1-paul@crapouillou.net>
On 04-05-19, 23:37, Paul Cercueil wrote:
> When a multi-descriptor DMA transfer is in progress, the "IRQ pending"
> flag will apparently be set for that channel as soon as the last
> descriptor loads, way before the IRQ actually happens. This behaviour
> has been observed on the JZ4725B, but maybe other SoCs are affected.
>
> In the case where another DMA transfer is running into completion on a
> separate channel, the IRQ handler would then run the completion handler
> for our previous channel even if the transfer didn't actually finish.
>
> Fix this by checking in the completion handler that we're indeed done;
> if not the interrupted DMA transfer will simply be resumed.
Applied, thanks
--
~Vinod
prev parent reply other threads:[~2019-05-21 4:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-04 21:37 [PATCH] dmaengine: jz4780: Fix transfers being ACKed too soon Paul Cercueil
2019-05-21 4:30 ` Vinod Koul [this message]
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