Re: [PATCH v2 2/4] dma: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver

Laurent Pinchart
2019-12-20T16:02:47Z

On Fri, Dec 20, 2019 at 09:10:59PM +0530, Vinod Koul wrote:
> On 20-12-19, 14:35, Laurent Pinchart wrote:
> > On Fri, Dec 20, 2019 at 01:31:27PM +0530, Vinod Koul wrote:
> > > On 20-12-19, 07:13, Laurent Pinchart wrote:
> > >
> > > > > OK, in the light of this information I'll keep the two separate and will
> > > > > switch to vchan as requested by Vinod.
> > > >
> > > > I've moved forward with this task, but eventually ran into one hack in
> > > > the driver that is more difficult to get rid of than the other ones.
> > > >
> > > > For display operation, the DPSUB driver needs to submit cyclic
> > > > interleaved transfer requests. There's no such thing (as far as I can
> > > > tell) in the DMA engine API, so the DPDMA drive simply keeps processing
> > >
> > > we do support interleave, you need to implement
> > > .device_prep_interleaved_dma and use dmaengine_prep_interleaved_dma()
> > > from the client
> >
> > I mean both interleaved and cyclic at the same time.
> >
> > > > the same descriptor over and over again until a new one is issued. The
> > > > hardware supports this with the help of hardware-based chaining of
> > > > descriptors, and the DPDMA driver simply sets the next pointer of the
> > > > descriptor to itself.
> > > >
> > > > How can I solve this in a way that wouldn't abuse the DMA engine API ?
> > >
> > > Is this not a cyclic case of descriptor?
> >
> > Exactly my point :-) It's cyclic, but has to be interleaved too as it's
> > a 2D transfer.
>
> IIRC the interleaved descriptor can be set in such a way that last chunk
> points to the first one..

I don't see a way to do this in the existing API, am I missing something
? And how would the completion handler be called in that case, once per
frame still ? I don't think vchan supports this at the moment

> I think Jassi had good ideas for generic interleave API which can do
> all this :)

How do I get this driver moving forward in the meantime ? :-)