From: Vinod Koul <vkoul@kernel.org>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Jassi Brar <jaswinder.singh@linaro.org>
Cc: Hyun Kwon <hyun.kwon@xilinx.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
Michal Simek <michals@xilinx.com>, Hyun Kwon <hyunk@xilinx.com>,
Tejas Upadhyay <tejasu@xilinx.com>,
Satish Kumar Nagireddy <SATISHNA@xilinx.com>
Subject: Re: [PATCH v2 2/4] dma: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver
Date: Fri, 20 Dec 2019 21:10:59 +0530 [thread overview]
Message-ID: <20191220154059.GR2536@vkoul-mobl> (raw)
In-Reply-To: <20191220123523.GB4865@pendragon.ideasonboard.com>
Hi Laurent,
On 20-12-19, 14:35, Laurent Pinchart wrote:
> On Fri, Dec 20, 2019 at 01:31:27PM +0530, Vinod Koul wrote:
> > On 20-12-19, 07:13, Laurent Pinchart wrote:
> >
> > > > OK, in the light of this information I'll keep the two separate and will
> > > > switch to vchan as requested by Vinod.
> > >
> > > I've moved forward with this task, but eventually ran into one hack in
> > > the driver that is more difficult to get rid of than the other ones.
> > >
> > > For display operation, the DPSUB driver needs to submit cyclic
> > > interleaved transfer requests. There's no such thing (as far as I can
> > > tell) in the DMA engine API, so the DPDMA drive simply keeps processing
> >
> > we do support interleave, you need to implement
> > .device_prep_interleaved_dma and use dmaengine_prep_interleaved_dma()
> > from the client
>
> I mean both interleaved and cyclic at the same time.
>
> > > the same descriptor over and over again until a new one is issued. The
> > > hardware supports this with the help of hardware-based chaining of
> > > descriptors, and the DPDMA driver simply sets the next pointer of the
> > > descriptor to itself.
> > >
> > > How can I solve this in a way that wouldn't abuse the DMA engine API ?
> >
> > Is this not a cyclic case of descriptor?
>
> Exactly my point :-) It's cyclic, but has to be interleaved too as it's
> a 2D transfer.
IIRC the interleaved descriptor can be set in such a way that last chunk
points to the first one.. I think Jassi had good ideas for generic
interleave API which can do all this :)
--
~Vinod
next prev parent reply other threads:[~2019-12-20 15:42 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-07 2:13 [PATCH v2 0/4] dma: Add Xilinx ZynqMP DPDMA driver Laurent Pinchart
2019-11-07 2:13 ` [PATCH v2 1/4] dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA Laurent Pinchart
2019-11-13 13:24 ` Rob Herring
2019-11-07 2:13 ` [PATCH v2 2/4] dma: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver Laurent Pinchart
2019-11-09 17:59 ` Vinod Koul
2019-12-05 15:04 ` Laurent Pinchart
2019-12-05 16:39 ` Vinod Koul
2019-12-05 20:27 ` Hyun Kwon
2019-12-08 16:03 ` Laurent Pinchart
2019-12-20 5:13 ` Laurent Pinchart
2019-12-20 8:01 ` Vinod Koul
2019-12-20 12:35 ` Laurent Pinchart
2019-12-20 15:40 ` Vinod Koul [this message]
2019-12-20 16:02 ` Laurent Pinchart
2020-01-03 0:59 ` Laurent Pinchart
2020-01-09 15:57 ` Laurent Pinchart
2020-01-10 7:41 ` Vinod Koul
2020-01-22 16:52 ` Laurent Pinchart
2019-11-07 2:13 ` [PATCH v2 3/4] dma: xilinx: dpdma: Add debugfs support Laurent Pinchart
2019-11-07 2:14 ` [PATCH v2 4/4] arm64: dts: zynqmp: Add DPDMA node Laurent Pinchart
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