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From: Vinod Koul <vkoul@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Viresh Kumar <vireshk@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/5] dmaengine: dw: Introduce non-mem peripherals optimizations
Date: Mon, 17 Aug 2020 11:58:47 +0530	[thread overview]
Message-ID: <20200817062847.GM2639@vkoul-mobl> (raw)
In-Reply-To: <20200731200826.9292-1-Sergey.Semin@baikalelectronics.ru>

On 31-07-20, 23:08, Serge Semin wrote:
> After a lot of tests and thorough DW DMAC databook studying we've
> discovered that the driver can be optimized especially when it comes to
> working with non-memory peripherals.
> 
> First of all we've found out that since each DW DMAC channel can
> be synthesized with different parameters, then even when two of them
> are configured to perform the same DMA transactions they may execute them
> with different performance. Since some DMA client devices might be
> sensitive to such important parameter as performance, then it is a good
> idea to let them request only suitable DMA channels. In this patchset we
> introduce a functionality, which makes it possible by passing the DMA
> channels mask either over the "dmas" DT property or in the dw_dma_slave
> platform data descriptor.
> 
> Secondly FIFO-mode of the "FIFO readiness" criterion is more suitable for
> the pure memory DMA transfers, since it minimizes the system bus
> utilization, but causes some performance drop. When it comes to working with
> non-memory peripherals the DMA engine performance comes to the first
> place. Since normally DMA client devices keep data in internal FIFOs, any
> latency at some critical moment may cause a FIFO being overflown and
> consequently losing data. So in order to minimize a chance of the DW DMAC
> internal FIFO being a bottle neck during the DMA transfers to and from
> non-memory peripherals we propose not to use FIFO-mode for them.
> 
> Thirdly it has been discovered that using a DMA transaction length is
> redundant when calculating the destination transfer width for the
> dev-to-mem DMA communications. That shall increase performance of the DMA
> transfers with unaligned data length.
> 
> Finally there is a small optimization in the burst length setting. In
> particular we've found out, that according to the DW DMAC databoot it's
> pointless to set one for the memory peripherals since they don't have
> handshaking interface connected to the DMA controller. So we suggest to
> just ignore the burst length config when it comes to setting the memory
> peripherals up.

Applied all, thanks

-- 
~Vinod

      parent reply	other threads:[~2020-08-17  6:28 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-31 20:08 [PATCH v2 0/5] dmaengine: dw: Introduce non-mem peripherals optimizations Serge Semin
2020-07-31 20:08 ` [PATCH v2 1/5] dt-bindings: dma: dw: Add optional DMA-channels mask cell support Serge Semin
2020-08-03 21:51   ` Rob Herring
2020-08-17 10:00     ` Andy Shevchenko
2020-08-19 14:02       ` Rob Herring
2020-07-31 20:08 ` [PATCH v2 2/5] dmaengine: dw: Activate FIFO-mode for memory peripherals only Serge Semin
2020-07-31 20:08 ` [PATCH v2 3/5] dmaengine: dw: Discard dlen from the dev-to-mem xfer width calculation Serge Semin
2020-07-31 20:08 ` [PATCH v2 4/5] dmaengine: dw: Ignore burst setting for memory peripherals Serge Semin
2020-07-31 20:08 ` [PATCH v2 5/5] dmaengine: dw: Add DMA-channels mask cell support Serge Semin
2020-08-17  6:28 ` Vinod Koul [this message]

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