From: Vinod Koul <vkoul@kernel.org>
To: Sia Jee Heng <jee.heng.sia@intel.com>
Cc: Eugeniy.Paltsev@synopsys.com, andriy.shevchenko@linux.intel.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
Date: Mon, 9 Nov 2020 15:24:17 +0530 [thread overview]
Message-ID: <20201109095417.GE3171@vkoul-mobl> (raw)
In-Reply-To: <20201027063858.4877-12-jee.heng.sia@intel.com>
On 27-10-20, 14:38, Sia Jee Heng wrote:
> Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
> Schemas DT binding.
This patch should be 10th one, we add binding before its use in the
drivers
>
> Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com>
> ---
> .../bindings/dma/snps,dw-axi-dmac.yaml | 25 +++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> index e688d25864bc..0e9bc5553a36 100644
> --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> @@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller
>
> maintainers:
> - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com
> + - Sia, Jee Heng <jee.heng.sia@intel.com>
That is intel representation and not your name, right! This need to be
your name in from Firname MiddleName Lastname <email>
>
> description: |
> Synopsys DesignWare AXI DMA Controller DT Binding
> @@ -16,6 +17,7 @@ properties:
> compatible:
> enum:
> - snps,axi-dma-1.01a
> + - intel,kmb-axi-dma
>
> reg:
> items:
> @@ -24,6 +26,7 @@ properties:
> reg-names:
> items:
> - const: axidma_ctrl_regs
> + - const: axidma_apb_regs
>
> interrupts:
> maxItems: 1
> @@ -122,3 +125,25 @@ examples:
> snps,priority = <0 1 2 3>;
> snps,axi-max-burst-len = <16>;
> };
> +
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + /* example with intel,kmb-axi-dma */
> + #define KEEM_BAY_PSS_AXI_DMA
> + #define KEEM_BAY_PSS_APB_AXI_DMA
> + axi_dma: dma@28000000 {
> + compatible = "intel,kmb-axi-dma";
> + reg = <0x28000000 0x1000 0x20250000 0x24>;
> + reg-names = "axidma_ctrl_regs", "axidma_apb_regs";
> + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> + clock-names = "core-clk", "cfgr-clk";
> + clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk KEEM_BAY_PSS_APB_AXI_DMA>;
> + #dma-cells = <1>;
> + dma-channels = <8>;
> + snps,dma-masters = <1>;
> + snps,data-width = <4>;
> + snps,priority = <0 0 0 0 0 0 0 0>;
> + snps,block-size = <1024 1024 1024 1024 1024 1024 1024 1024>;
> + snps,axi-max-burst-len = <16>;
> + };
> --
> 2.18.0
--
~Vinod
next prev parent reply other threads:[~2020-11-09 9:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-27 6:38 [PATCH v2 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-11-09 9:26 ` Vinod Koul
2020-11-11 1:36 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-11-09 9:42 ` Vinod Koul
2020-11-11 1:38 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-11-09 9:51 ` Vinod Koul
2020-11-11 1:44 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 10/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-11-09 9:54 ` Vinod Koul [this message]
2020-11-11 1:50 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-11-09 9:57 ` Vinod Koul
2020-11-11 1:53 ` Sia, Jee Heng
2020-10-27 6:38 ` [PATCH v2 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-10-27 6:38 ` [PATCH v2 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng
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